IP Library Assignment 029046/0187
Patent Assignment
Reel/Frame 029046/0187

ASSIGNMENT OF ASSIGNOR'S INTEREST

Recorded: 2012-09-28 Received: 2012-09-28 Pages: 3
Assignors
HIGASHI, KAZUYUKI
Executed: 2012-09-18
SUGIZAKI, YASHIAKI
Executed: 2012-09-18
Assignee
KABUSHIKI KAISHA TOSHIBA
1-1, SHIBAURA 1-CHOME, MINATO-KU, TOKYO, JPX, 105-8001, JAPAN
Covered Application (1)
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING CHIP STACKS COMBINED IN RELATION TO THE NUMBER OF CHIPS HAVING DEFECTS
App. No. 13/601,088