IP Library Assignment 030675/0084
Patent Assignment
Reel/Frame 030675/0084

Assignment of Assignor's Interest

Recorded: 2013-06-24 Pages: 14
Assignors
CHANG, TSUNG-YUNG
Executed: 2013-05-09
HAMZAOGLU, FATIH
Executed: 2013-02-22
PANDYA, GUNJAN H.
Executed: 2012-11-16
CHIU, SIUFU
Executed: 2013-02-22
ZHANG, KEVIN
Executed: 2012-11-14
CHEN, WEI
Executed: 2012-11-14
Assignee
INTEL CORPORATION
2200 MISSION COLLEGE BOULEVARD, SANTA CLARA, CALIFORNIA, 95052
Covered Property (1)
Bitline Floating During Non-Access Mode for Memory Arrays
Patent: 8,982,659 →
Application: 12/645,623 →
Publication: US 2011/0149666
Related Assignments (2)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Mar 8, 2010
From: CHANG, TSUNG-YUNG; HAMZAOGLU, FATIH; PANDYA, GUNJAN H.; CHIU, SIUFU
To: INTEL CORPORATION
Reel/Frame 024040/0213 →
Assignment of Assignor's Interest Sep 17, 2025
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP. (DBA SOLIDIGM)
Reel/Frame 072915/0599 →