Patent Assignment
Reel/Frame 031011/0857
Assignment of Assignor's Interest
Recorded: 2013-08-14
Pages: 4
Assignor
TENSILICA, INC.
Executed: 2013-08-08
Assignee
CADENCE DESIGN SYSTEMS, INC.
2655 SEELY AVENUE, SAN JOSE, CALIFORNIA, 95134
Covered Properties
(10)
Method for multiple processor system-on-a-chip hardware and software cogeneration
Patent:
8,639,487 →
Application:
10/400,157 →
Method and Apparatus for Providing User-Defined Interfaces for a Configurable Processor
Patent:
8,539,399 →
Application:
11/829,063 →
System and Method of Designing Instruction Extensions to Supplement an Existing Processor Instruction Set Architecture
System and Method of Customizing an Existing Processor Design Having an Existing Processor Instruction Set Architecture with Instruction Extensions
Automated Processor Generation System and Method for Designing a Configurable Processor
System and Method for Preventing Proper Execution of an Application Program in an Unauthorized Processor
Method and System for Automatic Generation of Processor Datapaths
Audio Digital Signal Processor
Bit-Level Register File Updates in Extensible Processor Architecture
Automatic Register Port Selection in Extensible Processor Architecture
Related Assignments
(5)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Jun 30, 2003
From: EZER, GULBIN AYSE; KONAS, PAVLOS; ANDREWS, JOHN BARRETT; CHOU, STEPHEN WEI
To: TENSILICA, INC.
Reel/Frame 014229/0058 →
Assignment of Assignor's Interest
May 7, 2009
From: PETKOV, DARIN S.; MAYDAN, DROR E.; PATWARDHAN, PUSHKAR G.; GHANEKAR, SACHIN P.
To: TENSILICA, INC.
Reel/Frame 022650/0223 →
Assignment of Assignor's Interest
Dec 31, 2012
From: SUN, FEI
To: TENSILICA INC.
Reel/Frame 029550/0960 →
Assignment of Assignor's Interest
Dec 31, 2012
From: SUN, FEI
To: TENSILICA INC.
Reel/Frame 029550/0988 →
Assignment of Assignor's Interest
Feb 21, 2013
From: MAYDAN, DROR E.; HUFFMAN, WILLIAM A.; GHANEKAR, SACHIN; SUN, FEI
To: TENSILICA, INC.
Reel/Frame 029851/0512 →