IP Library › Assignment 031153/0219
Patent Assignment
Reel/Frame 031153/0219

Assignment of Assignor's Interest

Recorded: 2013-09-06 Pages: 4
Assignors
SHU, LEE-LEAN
Executed: 2013-08-22
TUNG, CHENMING W.
Executed: 2013-09-06
LEE, HSIN YOU S.
Executed: 2013-08-22
Assignee
GSI TECHNOLOGY INC.
1213 ELKO DRIVE, SUNNYVALE, CALIFORNIA, 94089
Covered Properties (3)
Systems and Methods of Sectioned Bit Line Memory Arrays, Some Including Hierarchical and/or Other Features
Systems and Methods of Sectioned Bit Line Memory Arrays
Patent: 8,593,860 →
Application: 13/316,391 →
Publication: US 2013/0148414
Systems and Methods of Sectioned Bit Line Memory Arrays, Including Hierarchical and/or Other Features
Patent: 8,693,236 →
Application: 13/399,986 →
Publication: US 2013/0148415
Related Assignments (1)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Jun 30, 2015
From: SHU, LEE-LEAN; TUNG, CHENMING W.; LEE, HSIN YOU S.
To: GSI TECHNOLOGY INC.
Reel/Frame 035944/0892 →