Patent Assignment
Reel/Frame 031901/0736
Assignment of Assignor's Interest
Recorded: 2014-01-07
Pages: 9
Assignors
CHIH, YUE-DER
Executed: 2013-05-27
YU, HUNG-CHANG
Executed: 2013-05-27
LIN, KAI-CHUN
Executed: 2013-08-27
HUANG, CHIN-YI
Executed: 2013-05-29
TRAN, LAUN C.
Executed: 2013-12-20
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO. LTD.
NO. 8, LI-HSIN RD. 6, HSIN-CHU SCIENCE PARK, HSIN-CHU, 300-77, TAIWAN
Covered Property
(1)
MRAM Smart Bit Write Algorithm with Error Correction Parity Bits