Patent Assignment
Reel/Frame 032465/0760
Assignment of Assignor's Interest
Recorded: 2014-03-18
Pages: 4
Assignors
CHEN, YI-FAN
Executed: 2013-10-23
HSIEH, TUNG-HENG
Executed: 2013-10-23
HOU, CHIN-SHAN
Executed: 2013-10-23
WU, YU-BEY
Executed: 2013-10-23
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
NO. 8, LI-HSIN RD. 6, SCIENCE-BASED INDUSTRIAL PARK, HSIN-CHU, 300-77, TAIWAN
Covered Property
(1)
Method and Apparatus for Integrated Circuit Layout