Patent Assignment
Reel/Frame 033069/0053
Assignment of Assignor's Interest
Recorded: 2014-06-10
Pages: 3
Assignee
WASEDA UNIVERSITY
104, TOTSUKAMACHI 1-CHOME, SHINJUKU-KU, TOKYO, 169-8050, JAPAN
Covered Property
(1)
Processor, Accelerator, And Direct Memory Access Controller Within A Processor Core That Each Reads/Writes A Local Synchronization Flag Area For Parallel Execution
Related Assignments
(2)
Other recorded transfers of the patent in this record — the chain of ownership.