IP Library Assignment 033491/0859
Patent Assignment
Reel/Frame 033491/0859

Assignment of Assignor's Interest

Recorded: 2014-08-08 Pages: 3
Assignor
CHANG, JIA-YANG
Executed: 2014-08-05
Assignee
MEDIATEK INC.
NO. 1, DUSING RD. 1ST, SCIENCE-BASED INDUSTRIAL PARK, HSIN-CHU, TAIWAN
Covered Property (1)
Graphics Processing Circuit Having Second Vertex Shader Configured to Reuse Output of First Vertex Shader and/or Process Repacked Vertex Thread Group and Related Graphics Processing Method Thereof
Patent: 9,424,686 →
Application: 14/454,738 →
Publication: US 2016/0042560
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Mar 18, 2021
From: MEDIATEK INC.
To: XUESHAN TECHNOLOGIES INC.
Reel/Frame 056593/0167 →