Patent Assignment
Reel/Frame 034064/0139
Assignment of Assignor's Interest
Recorded: 2014-10-29
Pages: 2
Assignors
LIU, SHOU-EN
Executed: 2014-10-14
CHANG, CHUN-WEI
Executed: 2014-10-20
LIN, BI-LING
Executed: 2014-10-20
TSAI, YUNG-SHENG
Executed: 2014-10-14
SHIH, JIAW-REN
Executed: 2014-10-21
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
NO. 8, LI-HSIN RD. VI, HSINCHU SCIENCE PARK, HSINCHU, 300, TAIWAN
Covered Property
(1)
Circuit Layout, Layout Method and System for Implementing the Method