IP Library Assignment 034125/0840
Patent Assignment
Reel/Frame 034125/0840

Assignment of Assignor's Interest

Recorded: 2014-11-07 Pages: 5
Assignors
KUO, CHIH-CHENG
Executed: 2014-11-03
YANG, WEN-CHIEH
Executed: 2014-11-03
CHANG, CHU-HSIN
Executed: 2014-11-03
TUNG, TAI-LAI
Executed: 2014-11-03
Assignee
MSTAR SEMICONDUCTOR, INC.
4F-1, NO. 26, TAI-YUAN ST., CHU PEI, HSINCHU HSIEN, 302, TAIWAN
Covered Property (1)
Circuit and Method for Calculating Error of Sampling Clock, and Signal Receiving Circuit and Method
Patent: 9,191,195 →
Application: 14/535,599 →
Publication: US 2015/0124913
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Merger Jun 8, 2020
From: MSTAR SEMICONDUCTOR, INC.
To: MEDIATEK INC.
Reel/Frame 052871/0833 →