Patent Assignment
Reel/Frame 034512/0622
Merger
Recorded: 2014-12-16
Pages: 5
Assignor
CRAY RESEARCH, INC.
Executed: 1998-12-29
Assignee
CRAY RESEARCH, L.L.C.
2011 N. SHORELINE BOULEVARD, MOUNTAIN VIEW, CALIFORNIA, 94043-1389
Covered Properties
(18)
Scalar/Vector Processor
Patent:
5,430,884 →
Application:
07/536,409 →
Vectorized Lr Parsing of Computer Programs
Patent:
5,193,192 →
Application:
07/571,502 →
Method for Representing Scalar Data Dependences for an Optimizing Compiler
Patent:
5,107,418 →
Application:
07/571,503 →
Graphical Display of Compiler-Generated Intermediate Database Representation
Patent:
5,187,789 →
Application:
07/640,909 →
Method for Optimizing Instruction Scheduling for a Processor Having Multiple Functional Resources
Patent:
5,202,975 →
Application:
07/896,895 →
Method for Inserting a Path Instruction During Compliation of Comuter Programs for Processors Having Multiple Functional Units
Patent:
5,307,478 →
Application:
07/969,789 →
System Having Integrated Dispatcher for Self Scheduling Processors to Execute Multiple Types of Processes
Patent:
5,452,452 →
Application:
08/072,655 →
Method and Apparatus for a Multiprocessor Resource Lockout Instruction
Patent:
5,499,356 →
Application:
08/173,923 →
Method and Apparatus for Separate Mark and Wait Instructions for Processors Having Multiple Memory Ports
Patent:
5,381,536 →
Application:
08/249,084 →
Responding to Service Requests Using Minimal System-Side Context in a Multiprocessor Environment
Patent:
5,390,329 →
Application:
08/277,776 →
Method and Apparatus for Chaining Vector Instructions
Patent:
5,640,524 →
Application:
08/395,320 →
Vector Processor Having Functional Unit Paths of Differing Pipeline Lengths
Patent:
5,598,547 →
Application:
08/478,815 →
Data Processing System for Processing One and Two Parcel Instructions
Patent:
5,717,881 →
Application:
08/481,060 →
Method of Processing Conditional Branch Instructions in Scalar/Vector Processor
Patent:
5,706,490 →
Application:
08/484,103 →
Method of Processing a Sequence of Conditional Vector If Statements
Patent:
5,623,650 →
Application:
08/484,124 →
Partitioned Addressing Apparatus for Vector/Scalar Registers
Patent:
5,745,721 →
Application:
08/485,017 →
Vector/Scalar Processor with Simultaneous Processing and Instruction Cache Filling
Patent:
5,659,706 →
Application:
08/486,612 →
Vector Processor Having Registers for Control by Vector Registers
Patent:
5,544,337 →
Application:
08/487,952 →
Related Assignments
(5)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Jan 8, 2015
From: BEARD, DOUGLAS R.; PHELPS, ANDREW E.; WOODMANSEE, MICHAEL A.; BLEWETT, RICHARD G.
To: SUPERCOMPUTER SYSTEMS LIMITED PARTNERSHIP
Reel/Frame 034667/0127 →
Security Interest
Jan 8, 2015
From: SUPERCOMPUTER SYSTEMS LIMITED PARTNERSHIP
To: IBM HOLDINGS, INC.
Reel/Frame 034667/0152 →
Assignment of Assignor's Interest
Jan 8, 2015
From: SUPERCOMPUTER SYSTEMS LIMITED PARTNERSHIP
To: CRAY RESEARCH, INC.
Reel/Frame 034667/0175 →
Release of Security Interest
Jan 8, 2015
From: IBM HOLDINGS, INC.
To: CRAY RESEARCH, INC.
Reel/Frame 034667/0201 →
Assignment of Assignor's Interest
Oct 20, 2015
From: GRAPHICS PROPERTIES HOLDINGS, INC.
To: RPX CORPORATION
Reel/Frame 036901/0951 →