IP Library Assignment 035104/0917
Patent Assignment
Reel/Frame 035104/0917

Assignment of Assignor's Interest

Recorded: 2015-03-06 Pages: 5
Assignors
WAKCHAURE, YOGESH B.
Executed: 2015-03-05
MADRASWALA, ALIASGAR S.
Executed: 2015-03-05
GAEWSKY, KRISTOPHER H.
Executed: 2015-03-05
SRINIVASAN, CHARAN
Executed: 2015-03-05
Assignee
INTEL CORPORATION
2200 MISSION COLLEGE BOULEVARD, SANTA CLARA, CALIFORNIA, 95054
Covered Property (1)
Techniques for Improving Reliability and Performance of Partially Written Memory Blocks in Modern Flash Memory Systems
Patent: 9,208,888 →
Application: 14/318,572 →
Publication: US 2015/0380095
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Jan 19, 2023
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP.
Reel/Frame 062437/0255 →