IP Library Assignment 035316/0153
Patent Assignment
Reel/Frame 035316/0153

ASSIGNMENT OF ASSIGNOR'S INTEREST

Recorded: 2015-04-01 Received: 2015-04-01 Pages: 5
Assignors
BELWAL, SHIVA
Executed: 2015-03-23
MAHAJAN, DEEPAK
Executed: 2015-03-23
MISHRA, ATEET
Executed: 2015-03-24
Assignee
FREESCALE SEMICONDUCTOR,INC
6501 WILLIAM CANNON DRIVE WEST, AUSTIN, TX, 78735, UNITED STATES
Covered Application (1)
SYSTEM FOR VERIFYING TIMING CONSTRAINTS OF IC DESIGN
App. No. 14/675,752