Patent Assignment
Reel/Frame 035621/0072
Assignment of Assignor's Interest
Recorded: 2015-05-12
Pages: 5
Assignors
RAGHAVAN, SRIVATSAN
Executed: 2015-03-05
GURURAJ, KARTHICK
Executed: 2015-03-05
PENDHARKAR, SANDEEP
Executed: 2015-03-05
D.K., SOMESHWAR
Executed: 2015-03-05
NAGARADDI, SHRINIVAS
Executed: 2015-03-05
Assignee
VAYAVYA LABS PRIVATE LIMITED
PLOT NO.12 CTS-4838, SECOND MAIN FIRST CROSS, SADASHIV NAGAR, BELGAUM, 590001, INDIA
Covered Property
(1)
Computer-Implemented Verification System for Performing a Functional Verification of an Integrated Circuit