IP Library Assignment 035782/0902
Patent Assignment
Reel/Frame 035782/0902

Corrective Assignment to Correct the Inventors' Execution Dates Previously Recorded at Reel: 035689 Frame: 0350. Assignor(S) Hereby Confirms the Assignment.

Recorded: 2015-05-27 Pages: 6
Assignors
IWASHIRO, TARO
Executed: 2015-04-09
HAGA, TAKUYA
Executed: 2015-04-09
Assignee
KABUSHIKI KAISHA TOSHIBA
1-1, SHIBAURA 1-CHOME, MINATO-KU, TOKYO, 105-8001, JAPAN
Covered Property (1)
Memory System Including a Plurality of Chips and a Selectively-Connecting Bus
Application: 14/644,590 →
Publication: US 2016/0179402
Related Assignments (5)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest May 21, 2015
From: IWASHIRO, TARO; HAGA, TAKUYA
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 035689/0350 →
Assignment of Assignor's Interest Jul 5, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043088/0620 →
Merger Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
Change of Name and Address Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
Change of Name and Address Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →