Patent Assignment
Reel/Frame 036265/0112
Assignment of Assignor's Interest
Recorded: 2015-08-06
Pages: 10
Assignors
BHARADWAJ, PRAHLADACHAR J. JAYAPRAKASH
Executed: 2014-05-07
DAS SHARMA, DEBENDRA
Executed: 2015-07-17
POLADIA, HARSHIT K.
Executed: 2014-08-08
GADEY NAGA VENKATA, KANAKA LAKSHMI
Executed: 2015-07-17
Assignee
INTEL CORPORATION
2200 MISSION COLLEGE BOULEVARD, SANTA CLARA, CALIFORNIA, 95054
Covered Property
(1)
Method, Apparatus, System for Lane Staggering and Determinism for Serial High Speed I/O Lanes
Related Assignments
(1)
Other recorded transfers of the patent in this record — the chain of ownership.