IP Library Assignment 037123/0880
Patent Assignment
Reel/Frame 037123/0880

Assignment of Assignor's Interest

Recorded: 2015-11-23 Pages: 2
Assignors
YOSHIMOTO, YUHEI
Executed: 2015-10-28
KATOH, YOSHIKAZU
Executed: 2015-10-28
Assignee
PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
1-61, SHIROMI 2-CHOME, CHUO-KU, OSAKA-SHI, OSAKA, 540-6207, JAPAN
Covered Property (1)
Tamper-Resistant Non-Volatile Memory Device Comprising an Arithmetic Circuit That, in Operation, Calculates a Binary Reference Value Based on at Least a Part of the Pieces of Resistance Value Information, a Read Circuit That, in Operation , Selectively Assigns, Bas
Patent: 9,653,161 →
Application: 14/938,755 →
Publication: US 2016/0148680
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest May 27, 2020
From: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0870 →