Patent Assignment
Reel/Frame 037278/0779
Merger and Change of Name
Recorded: 2015-12-12
Pages: 11
Assignors
ORACLE USA, INC.
Executed: 2010-02-12
SUN MICROSYSTEMS, INC.
Executed: 2010-02-12
ORACLE AMERICA, INC.
Executed: 2010-02-12
Assignee
ORACLE AMERICA, INC.
500 ORACLE PARKWAY, REDWOOD SHORES, CALIFORNIA, 94065
Covered Properties
(100)
Method and Apparatus for Recovering Ecryption Session Keys
Patent:
6,775,382 →
Application:
08/885,018 →
Virtual Device Driver
Patent:
6,785,894 →
Application:
09/289,795 →
Dataflow Algorithm for Symbolic Computation of Lowest Upper Bound Type
Patent:
6,766,521 →
Application:
09/321,228 →
Dynamic Generation of Deadlock-Free Routings
Patent:
6,791,939 →
Application:
09/323,964 →
System and Method for Allocating and Using Arrays in a Shared-Memory Digital Computer System
Patent:
6,789,256 →
Application:
09/337,585 →
Deferrable Processing Option for Fast Path Forwarding
Patent:
6,788,680 →
Application:
09/383,086 →
System and Method for Facilitating Thread-Safe Message Passing Communications Among Threads in Respective Processes
Patent:
6,766,517 →
Application:
09/417,823 →
System for Obtaining Appropriate Device Device Drivers by Accessing Table Having List of Manufacturers and Link-Layer Addresses Assigned to Device Drivers
Patent:
6,772,420 →
Application:
09/426,748 →
Controlled Take Over of Services by Remaining Nodes of Clustered Computing System
Method and Apparatus for Dynamically Altering Configurations of Clustered Computer Systems
Patent:
6,769,008 →
Application:
09/480,466 →
Mechanism for Determining Restrictions to Impose on an Implementation of a Service
Patent:
6,792,537 →
Application:
09/483,246 →
Extensible Computing System
Patent:
6,779,016 →
Application:
09/502,170 →
System and Method for Performing a Synchronization Operation for Multiple Devices in a Computer System
Patent:
6,789,258 →
Application:
09/569,987 →
Mechanism for Obtaining a Thread Form, and Returning a Thread to, a Thread Pool Without Attaching and Detaching
Patent:
6,766,349 →
Application:
09/573,698 →
Parallel Greater Than Analysis Method and Apparatus
Patent:
6,772,187 →
Application:
09/586,657 →
System and Method for Implementing Memory Testing in a Sram Unit
Patent:
6,779,141 →
Application:
09/590,786 →
Coordinating Loop-Free Forwarding Table Updates
Patent:
6,768,740 →
Application:
09/633,969 →
Method and Apparatus Facilitating Automatic Persistence in Asymmetric Storage
Patent:
6,772,296 →
Application:
09/636,419 →
Reconfigurable Built-in Self-Test Engine for Testing a Reconfigurable Memory
Patent:
6,769,081 →
Application:
09/651,359 →
Mechanism and Apparatus for Web-Based Searching of Uri-Addressable Repositories in a Distributed Computing Environment
Patent:
6,789,077 →
Application:
09/653,612 →
Trusted Construction of Message Endpoints in a Distributed Computing Environment
Patent:
6,792,466 →
Application:
09/660,567 →
System and Method for Pre-Fetching for Pointer Linked Data Structures
Patent:
6,782,454 →
Application:
09/677,090 →
Storage Controller Configured to Select Unused Regions of a Storage Device for Data Storage According to Head Position
Patent:
6,789,162 →
Application:
09/690,599 →
Addressing Message Gates in a Distributed Computing Environment
Patent:
6,789,126 →
Application:
09/692,904 →
Arbitration Method and Apparatus
Patent:
6,782,441 →
Application:
09/697,222 →
Performing Dependent Subtraction on Arithmetic Intervals Within a Computer System
Patent:
6,779,006 →
Application:
09/710,080 →
Implementation of Nested Databases Using Flexible Locking Mechanisms
Patent:
6,772,154 →
Application:
09/714,336 →
Method for Efficient Modular Division Over Prime Integer Fields
Method and Apparatus for Filtering Lock Requests
Apparatus and Method for Generating a Partial Fullness Indicator Signal in a Fifo
Memory Information Accessing System for Preventing Power Delivery to Selected Portion of Device and Accessing Data Stored in Memory
Graphics System Having a Super-Sampled Sample Buffer with Hot Spot Correction
Graphics System Having a Super-Sampled Sample Buffer and Having Single Sample Per Pixel Support
Method and Apparatus for Using an Assist Processor and Value Speculation to Facilitate Prefetching for a Primary Processor
Method and Apparatus for Deskewing Multiple Incoming Signals
Method and Apparatus for Recovering from Failure of a Mirrored Boot Device
Power Distribution System with a Dedicated Power Structure and a High Performance Voltage Regulator
Method and Apparatus for Distributing Power to Integrated Circuits
Multi-Threaded Random Access Storage Device Qualification Tool
Method and Apparatus for Checkpointing to Facilitate Reliable Execution
Method and Apparatus for Storing Prior Versions of Modified Values to Facilitate Reliable Execution
System Observation Bus
Method, System, Program, and Computer Readable Medium for Indexing Object Oriented Objects in an Object Oriented Database
Reconfigurable Multi-Chip Modules
Generation of Delegating Implementation for Idl Interfaces Which Use Inheritance
Mapping Time-Sorted to Direction-Sorted Triangle Vertices
Method and System for Incorporating Filtered Roles in a Directory System
Method and System for Creating and Utilizing Managed Roles in a Directory System
Compactpci Hotswap Automatic Insertion/Extraction Test Equipment
Pci Riser Card Bracket Assembly
System for Providing Extended File Attributes
Method and Apparatus for Managing Remote Data Replication in a Distributed Computer System
Two-Pin Thermal Sensor Calibration Interface
Efficient Mamory Modification Tracking with Hierarchical Dirty Indicators
Control Logic for Memory Modification Tracking with Hierarchical Dirty Indicators
External Dirty Tag Bits for 3D-Ram Sram
Cache Synchronization Method, System and Apparatus for an Application and an Object Located in a Client Cache
Implementation of an Assertion Check in Atpg Models
System and Method for Providing Spatially Distributed Device Interaction
Synchronizing Multiple Display Channels
Removable Media Drives
System and Method for Small Read Only Data
2.5-D Graph for Multi-Layer Routing
Transmission Gate Based Signal Transition Accelerator
Reconfigurable Hardware Filter for Texture Mapping and Image Processing
Using Observability Logic for Real-Time Debugging of Asics
Method to Simplify and Speed Up Design Rule/Electrical Rule Checks
Phase Locked Loop Input Receiver Design with Delay Matching Feature
Post-Silicon Control of an Embedded Temperature Sensor
Post-Silicon Phase Offset Control of Phase Locked Loop Input Receiver
Queuing Delay Limiter
Method and Apparatus for Caching with Variable Size Locking Regions
Virtualizing and Controlling Input and Output of Computer Programs
Dynamically Characterizing Computer System Performance by Varying Multiple Input Variables Simultaneously
Method and Apparatus for Calibrating a Delay Locked Loop Charge Pump Current
Adjustment and Calibration System for Post-Fabrication Treatment of Phase Locked Loop Charge Pump
Memory Management System Supporting Object Deletion in Non-Volatile Memory
Attaching a Device Driver to Multiple Logical Devices of One Physical Device
Method, System and Computer Product to Produce a Computer-Generated Integrated Circuit Design
Cooling Computer Systems
Computer System Employing Redundant Cooling Fans
Method and Apparatus for Using a Non-Committing Data Cache to Facilitate Speculative Execution
Correction of Spacing Violations Between Wide Class Objects of Dummy Geometries
Correction of Spacing Violations Between Design Geometries and Wide Class Objects of Dummy Geometries
Circuit and Method for Dynamically Controlling the Impedance of an Input/Output Driver
Aggregation of Storage Elements into Stations and Placement of Same into an Integrated Circuit or Design
Optimal Alternating Power and Ground Shield Assignment Algorithm
Source Synchronous Interface Using Variable Digital Data Delay Lines
Cascode Sstl Output Buffer Using Source Followers
Boosting Simulation Performance by Dynamically Customizing Segmented Object Codes Based on Stimulus Coverage
Use of Coupling Capacitance to Balance Skew in a Network
Method and Apparatus for Fully Characterizing Propagation Delay Through an N-Input Circuit
Modular Spring Loaded Pci Card Retaining Device
I/O Power Supply Resonance Compensation Technique
Methodology for Determining the Placement of Decoupling Capacitors in a Power Distribution System
Fan with Automatic Failure Mode
Method and Apparatus for Using Acoustic Signals to Identify One or More Disk Drives That Are Likely to Fail
Unity Gain Interpolator for Delay Locked Loops
Component Access
Stable and Accurate Cmos Level Shifter
Patent:
6,788,125 →
Application:
10/446,477 →
Related Assignments
(3)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Jan 11, 2002
From: XCFTECH, INC.
To: TERRASPRING, INC.
Reel/Frame 012464/0001 →
Merger
Jun 1, 2006
From: TERRASPRING, INC.; BRITTANY ACQUISITION CORPORATION
To: TERRASPRING, INC.
Reel/Frame 017718/0942 →
Assignment of Assignor's Interest
Jun 1, 2006
From: TERRASPRING, INC.
To: SUN MICROSYSTEMS, INC.
Reel/Frame 017718/0955 →