Patent Assignment
Reel/Frame 038920/0467
Assignment of Assignor's Interest
Recorded: 2016-06-15
Pages: 5
Assignors
LEI, CHEOK-KEI
Executed: 2016-06-03
LI, YU-CHI
Executed: 2016-06-03
TSENG, CHIA-WEI
Executed: 2016-06-03
JIANG, ZHE-WEI
Executed: 2016-06-03
LIU, CHI-LIN
Executed: 2016-06-03
KAO, JERRY CHANG-JUI
Executed: 2016-06-03
YANG, JUNG-CHAN
Executed: 2016-06-03
LU, CHI-YU
Executed: 2016-06-03
ZHUANG, HUI-ZHONG
Executed: 2016-06-03
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
NO.8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK, HSINCHU, TAIWAN
Covered Property
(1)
Layout Method for Integrated Circuit and Layout of the Integrated Circuit