Patent Assignment
Reel/Frame 040862/0325
Assignment of Assignor's Interest
Recorded: 2017-01-05
Pages: 4
Assignors
WU, CHENG-TA
Executed: 2016-12-20
WU, CHII-MING
Executed: 2016-12-22
JANGJIAN, SHIU-KO
Executed: 2016-12-21
LIN, KUN-TZU
Executed: 2016-12-21
CHANG, LAN-FANG
Executed: 2016-12-21
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
NO. 8, LI-HSIN RD. VI, HSINCHU SCIENCE PARK, HSINCHU, 300, TAIWAN
Covered Property
(1)
Methods for Straining a Transistor Gate through Interlayer Dielectric (ILD) Doping Schemes