Patent Assignment
Reel/Frame 044237/0497
Assignment of Assignor's Interest
Recorded: 2017-11-28
Pages: 4
Assignors
KINDERMAN, YAEL
Executed: 2017-11-23
UZIEL, SHLOMI
Executed: 2017-11-23
AVRAHAM, IDO
Executed: 2017-11-23
PETRACCA, MICHELE
Executed: 2017-11-27
WATANABE, YOSINORI
Executed: 2017-11-22
Assignee
CADENCE DESIGN SYSTEMS, INC.
2655 SEELY AVENUE, SAN JOSE, CALIFORNIA, 95134
Covered Property
(1)
Constrained Metric Optimization of a System on Chip
Patent:
10,607,039 →
Application:
15/823,444 →