Patent Assignment
Reel/Frame 046174/0446
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded: 2018-05-16
Received: 2018-05-16
Pages: 13
Assignor
HGST TECHNOLOGIES SANTA ANA, INC.
Executed: 2018-04-10
Assignee
WESTERN DIGITAL TECHNOLOGIES, INC.
5601 GREAT OAKS PARKWAY, SAN JOSE, CA, 95119, UNITED STATES
Covered Applications
(100)
SOFT INFORMATION MODULE
App. No. 15/882,937
→
APPARATUS AND METHOD FOR DETERMINING AN OPERATING CONDITION OF A MEMORY CELL BASED ON CYCLE INFORMATION
App. No. 15/207,414
→
SYSTEM AND METHOD FOR DIRECT MEMORY ACCESS IN A FLASH STORAGE
App. No. 15/156,267
→
REDUCED COMPLEXITY NON-BINARY LDPC DECODING ALGORITHM
App. No. 15/132,143
→
METHODS FOR MANAGING FAILURE OF A SOLID STATE DEVICE IN A CACHING STORAGE
App. No. 14/976,518
→
DETERMINING BIAS INFORMATION FOR OFFSETTING OPERATING VARIATIONS IN MEMORY CELLS
App. No. 14/948,229
→
SOFT INFORMATION MODULE
App. No. 14/853,941
→
METHOD AND SYSTEM FOR HASH KEY MEMORY REDUCTION
App. No. 14/841,635
→
OPTIMIZED GARBAGE COLLECTION ALGORITHM TO IMPROVE SOLID STATE DRIVE RELIABILITY
App. No. 14/798,400
→
PROGRAMMING ALGORITHM FOR IMPROVED FLASH MEMORY ENDURANCE AND RETENTION
App. No. 14/794,741
→
FLASH STORAGE DEVICE WITH POWER MONITORING
App. No. 14/788,658
→
SETTING OPERATING PARAMETERS FOR MEMORY CELLS BASED ON WORDLINE ADDRESS AND CYCLE INFORMATION
App. No. 14/724,773
→
ASYMMETRIC LOG-LIKELIHOOD RATIO FOR FLASH CHANNEL
App. No. 14/724,770
→
SYSTEM AND METHOD FOR CACHING VIRTUAL MACHINE DATA
App. No. 14/722,873
→
HIGH SPEED INPUT/OUTPUT PERFORMANCE IN SOLID STATE DEVICES
App. No. 14/720,697
→
MULTI-LAYER PAD RING FOR INTEGRATED CIRCUIT
App. No. 14/657,780
→
APPARATUS, SYSTEMS, AND METHODS FOR OPERATING FLASH BACKED DRAM MODULE
App. No. 14/624,255
→
REDUCED COMPLEXITY NON-BINARY LDPC DECODING ALGORITHM
App. No. 14/607,039
→
ASYMMETRIC LOG-LIKELIHOOD RATIO FOR FLASH CHANNEL
App. No. 14/500,904
→
STORAGE SYSTEM WITH REDUCED HASH KEY MEMORY
App. No. 14/456,581
→
SYSTEMS AND METHODS FOR READ CACHING IN FLASH STORAGE
App. No. 14/457,077
→
WORD-LINE INTER-CELL INTERFERENCE DETECTOR IN FLASH SYSTEM
App. No. 14/313,971
→
FLASH STORAGE DEVICE WITH READ DISTURB MITIGATION
App. No. 14/257,978
→
APPARATUS AND METHOD FOR DETERMINING AN OPERATING CONDITION OF A MEMORY CELL BASED ON CYCLE INFORMATION
App. No. 14/252,746
→
READ LEVEL ADJUSTMENT USING SOFT INFORMATION
App. No. 13/899,447
→
SYSTEM AND METHOD FOR ACCESSING AND STORING INTERLEAVED DATA
App. No. 13/873,183
→
SYSTEMS AND METHODS OF USING DYNAMIC DATA FOR WEAR LEVELING IN SOLID-STATE DEVICES
App. No. 13/853,989
→
SYSTEM AND METHOD FOR SCANNING FLASH MEMORIES
App. No. 13/843,218
→
SOFT INFORMATION MODULE
App. No. 13/843,225
→
POWER ARBITRATION FOR STORAGE DEVICES
App. No. 13/842,101
→
DETERMINING BIAS INFORMATION FOR OFFSETTING OPERATING VARIATIONS IN MEMORY CELLS BASED ON WORDLINE ADDRESS
App. No. 13/776,590
→
ADJUSTING OPERATING PARAMETERS FOR MEMORY CELLS BASED ON WORDLINE ADDRESS AND CYCLE INFORMATION
App. No. 13/775,070
→
REDUCED COMPLEXITY NON-BINARY LDPC DECODING ALGORITHM
App. No. 13/764,649
→
SYSTEMS AND METHODS FOR PROVIDING LOAD ISOLATION IN A SOLID-STATE DEVICE
App. No. 13/762,524
→
DATA STORAGE SYSTEM WITH PRIMARY AND SECONDARY COMPRESSION ENGINES
App. No. 13/754,837
→
SYSTEMS AND METHODS FOR AUTO-CALIBRATION OF A STORAGE MEMORY CONTROLLER
App. No. 13/752,823
→
PROGRAMMING ALGORITHM FOR IMPROVED FLASH MEMORY ENDURANCE AND RETENTION
App. No. 13/741,119
→
SYSTEM AND METHOD FOR REDUCING MEMORY IN A MULTI-CHANNEL PARALLEL ENCODER SYSTEM
App. No. 13/728,944
→
INTER-CELL INTERFERENCE ALGORITHMS FOR SOFT DECODING OF LDPC CODES
App. No. 13/725,943
→
WORD-LINE INTER-CELL INTERFERENCE DETECTOR IN FLASH SYSTEM
App. No. 13/725,689
→
APPARATUS FOR STACKING INTEGRATED CIRCUITS
App. No. 13/720,849
→
SYSTEM AND METHOD FOR STORING DATA USING A FLEXIBLE DATA FORMAT
App. No. 13/719,184
→
MULTI-LAYER INPUT/OUTPUT PAD RING FOR SOLID STATE DEVICE CONTROLLER
App. No. 13/714,590
→
METHODS FOR MANAGING FAILURE OF A SOLID STATE DEVICE IN A CACHING STORAGE
App. No. 13/689,074
→
DYNAMIC LDPC CODE RATE SOLUTION
App. No. 13/678,416
→
METHOD AND SYSTEM FOR HASH KEY MEMORY FOOTPRINT REDUCTION
App. No. 13/677,791
→
OPTIMIZED GARBAGE COLLECTION ALGORITHM TO IMPROVE SOLID STATE DRIVE RELIABILITY
App. No. 13/664,335
→
SYSTEM AND METHOD TO CACHE HYPERVISOR DATA
App. No. 13/662,183
→
Systems and Methods for Managing Key-Value Stores
App. No. 13/662,200
→
METHODS FOR MANAGING CACHE CONFIGURATION
App. No. 13/631,463
→
REDUCING A NUMBER OF CLOSE OPERATIONS ON OPEN BLOCKS IN A FLASH MEMORY
App. No. 13/611,577
→
WEAR LEVELING IN SOLID-STATE DEVICE
App. No. 13/597,158
→
MANAGING SECURITY IN SOLID-STATE DEVICES
App. No. 13/555,052
→
SECURE MEMORY DEVICES AND METHODS OF MANAGING SECURE MEMORY DEVICES
App. No. 13/555,050
→
OPTIMAL PROGRAMMING LEVELS FOR LDPC
App. No. 13/553,707
→
SYSTEM AND METHOD OF USING STRIPES FOR RECOVERING DATA IN A FLASH STORAGE SYSTEM
App. No. 13/532,718
→
FLASH STORAGE DEVICE WITH DATA INTEGRITY PROTECTION
App. No. 13/530,026
→
REDUCED MEMORY MULTI-CHANNEL PARALLEL ENCODER SYSTEM
App. No. 13/526,446
→
HIGH SPEED HARD LDPC DECODER
App. No. 13/525,009
→
METHODS FOR OPTIMIZING DATA MOVEMENT IN SOLID STATE DEVICES
App. No. 13/482,865
→
SOLID-STATE DEVICE WITH LOAD ISOLATION
App. No. 13/475,668
→
AUTO CALIBRATION OF STORAGE MEMORY CONTROLLER
App. No. 13/420,849
→
TRANSMISSION ERROR DETECTOR FOR FLASH MEMORY CONTROLLER
App. No. 13/420,970
→
ISOLATION DEVICES FOR HIGH PERFORMANCE SOLID STATE DRIVES
App. No. 13/407,095
→
ERASE-SUSPEND SYSTEM AND METHOD
App. No. 13/365,232
→
LOW DENSITY PARITY CHECK CODE DECODING SYSTEM AND METHOD
App. No. 13/343,684
→
METHODS AND SYSTEMS FOR OBJECT LEVEL DE-DUPLICATION FOR SOLID STATE DEVICES
App. No. 13/303,870
→
INTERLEAVED FLASH STORAGE SYSTEM AND METHOD
App. No. 13/289,966
→
ASYMMETRIC LOG-LIKELIHOOD RATIO FOR MLC FLASH CHANNEL
App. No. 13/253,029
→
APPARATUS AND METHOD FOR DETERMINING A READ LEVEL OF A FLASH MEMORY AFTER AN INACTIVE PERIOD OF TIME
App. No. 13/179,466
→
APPARATUS AND METHOD FOR MULTI-MODE OPERATION OF A FLASH MEMORY DEVICE
App. No. 13/177,482
→
APPARATUS AND METHOD FOR DETERMINING AN OPERATING CONDITION OF A MEMORY CELL BASED ON CYCLE INFORMATION
App. No. 13/177,518
→
SYSTEM AND METHOD FOR DETERMINING DATA DEPENDENT NOISE CALCULATION FOR A FLASH CHANNEL
App. No. 13/176,727
→
TRELLIS-CODED MODULATION IN A MULTI-LEVEL CELL FLASH MEMORY DEVICE
App. No. 13/118,137
→
APPARATUS AND METHOD FOR DETERMINING A READ LEVEL OF A MEMORY CELL BASED ON CYCLE INFORMATION
App. No. 13/076,340
→
APPARATUS AND METHOD FOR DETERMINING AN OPERATING CONDITION OF A MEMORY CELL BASED ON CYCLE INFORMATION
App. No. 13/044,464
→
SOLID STATE STORAGE DEVICE WITH REMOVABLE POWER BACKUP
App. No. 12/842,930
→
SOLID-STATE STORAGE DEVICE WITH MULTI-LEVEL ADDRESSING
App. No. 12/842,950
→
DATA STORAGE SYSTEM WITH COMPRESSION/DECOMPRESSION
App. No. 12/842,919
→
APPARATUS FOR STACKING INTEGRATED CIRCUITS
App. No. 12/828,175
→
FLASH STORAGE DEVICE WITH READ CACHE
App. No. 12/779,003
→
FLASH STORAGE DEVICE WITH READ DISTURB MITIGATION
App. No. 12/779,001
→
PARALLEL DATA STORAGE SYSTEM
App. No. 12/574,235
→
FLASH MEMORY ALLOCATION FOR IMPROVED PERFORMANCE AND ENDURANCE
App. No. 12/542,626
→
SYSTEM AND METHOD OF MAINTAINING DATA INTEGRITY IN A FLASH STORAGE DEVICE
App. No. 12/511,990
→
SYSTEM AND METHOD OF WEAR-LEVELING IN FLASH STORAGE
App. No. 12/511,994
→
FLASH STORAGE DEVICE WITH FLEXIBLE DATA FORMAT
App. No. 12/511,991
→
INTERLEAVED FLASH STORAGE SYSTEM AND METHOD
App. No. 12/508,538
→
SYSTEM AND METHOD FOR PERFORMING A DIRECT MEMORY ACCESS AT A PREDETERMINED ADDRESS IN A FLASH STORAGE
App. No. 12/508,531
→
FLASH STORAGE SYSTEM AND METHOD FOR ACCESSING A BOOT PROGRAM
App. No. 12/508,528
→
HIGH SPEED INPUT/OUTPUT PERFORMANCE IN SOLID STATE DEVICES
App. No. 12/492,109
→
ENHANCED MLC SOLID STATE DEVICE
App. No. 12/492,112
→
TABLE JOURNALING IN FLASH STORAGE DEVICES
App. No. 12/492,104
→
SLC-MLC COMBINATION FLASH STORAGE DEVICE
App. No. 12/492,113
→
REDUNDANT DATA DISTRIBUTION IN A FLASH STORAGE DEVICE
App. No. 12/492,107
→
SUPPORTING VARIABLE SECTOR SIZES IN FLASH STORAGE DEVICES
App. No. 12/492,103
→
VERIFIED PURGE FOR FLASH STORAGE DEVICE
App. No. 12/384,932
→
REDUNDANT PURGE FOR FLASH STORAGE DEVICE
App. No. 12/384,908
→
FLASH BACKED DRAM MODULE WITH STATE OF HEALTH AND/OR STATUS INFORMATION ACCESSIBLE THROUGH A CONFIGURATION DATA BUS
App. No. 12/369,052
→
STATE OF HEALTH MONITORED FLASH BACKED DRAM MODULE
App. No. 12/369,040
→