IP Library › Assignment 049242/0648
Patent Assignment
Reel/Frame 049242/0648

Assignment of Assignor's Interest

Recorded: 2019-05-21 Pages: 3
Assignor
FRANCE BREVETS
Executed: 2018-12-28
Assignee
SK HYNIX INC.
2091, GYEONGCHUNG-DAERO, BUBAL-EUB, ICHEON-SI, GYEONGGI-DO, KOREA, REPUBLIC OF
Covered Properties (3)
Cache Coherency in a Shared-Memory Multiprocessor System
Patent: 7,653,788 →
Application: 11/397,945 →
Publication: US 2006/0259705
Data Processing with Data Transfer Between Memories
Patent: 7,769,965 →
Application: 11/729,308 →
Publication: US 2007/0288691
Cache Coherency in a Shared-Memory Multiprocessor System
Patent: 7,971,003 →
Application: 12/694,100 →
Publication: US 2010/0199051
Related Assignments (4)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Jul 10, 2006
From: COUSIN, JEAN-PHILIPPE; BERENGUER, JEAN-JOSE; PELISSIER, GILLES
To: STMICROELECTRONICS SA
Reel/Frame 018045/0587 →
Assignment of Assignor's Interest Aug 27, 2008
From: COUVERT, PATRICE; CAUCHY, XAVIER; PHILIPPE, ANTHONY; FERROUSSAT, SEBASTIEN
To: STMICROELECTRONICS S.A.
Reel/Frame 021449/0729 →
Assignment of Assignor's Interest Feb 26, 2016
From: STMICROELECTRONICS SA
To: STMICROELECTRONICS INTERNATIONAL NV
Reel/Frame 037841/0686 →
Assignment of Assignor's Interest Jun 23, 2016
From: STMICROELECTRONICS INTERNATIONAL NV
To: FRANCE BREVETS
Reel/Frame 039140/0584 →