Assignment of Assignor's Interest

Recorded: 2019-06-06 Pages: 3

Assignors

MUKHERJEE, RAJDEEP

Executed: 2019-06-05

CHEN, BENJAMIN MENG-CHING

Executed: 2019-06-06

FARAH, HABEEB

Executed: 2019-06-06

HANNA, ZIYAD

Executed: 2019-06-06

Assignee

CADENCE DESIGN SYSTEMS, INC.

2655 SEELY AVENUE, SAN JOSE, CALIFORNIA, 95134

Covered Property (1)

System, Method, and Computer Program Product for Generating a Formal Verification Model

Patent: 10,789,404 →

Application: 16/434,129 →