Patent Assignment
Reel/Frame 050020/0001
Assignment of Assignor's Interest
Recorded: 2019-08-11
Pages: 7
Assignors
CONTRERAS, JOHN
Executed: 2016-12-30
DING, YUNFEI
Executed: 2017-01-03
HO, KUOK SAN
Executed: 2017-01-04
MCFADYEN, IAN
Executed: 2017-01-04
POSS, JOEY
Executed: 2017-01-03
Assignee
WESTERN DIGITAL TECHNOLOGIES, INC.
5601 GREAT OAKS PARKWAY, SAN JOSE, CALIFORNIA, 95119
Covered Property
(1)
High-Bandwidth Sto Bias Architecture with Integrated Slider Voltage Potential Control
Related Assignments
(4)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Interest
Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
Release of Security Interest at Reel 052915 Frame 0566
Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
Patent Collateral Agreement - a&R Loan Agreement
Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
Patent Collateral Agreement - Ddtl Loan Agreement
Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →