IP Library Assignment 050730/0124
Patent Assignment
Reel/Frame 050730/0124

Assignment of Assignor's Interest

Recorded: 2019-10-16 Pages: 10
Assignors
CHEN, LEI
Executed: 2019-10-08
WAKCHAURE, YOGESH B.
Executed: 2019-10-08
MADRASWALA, ALIASGAR S.
Executed: 2019-10-15
GUO, XIN
Executed: 2019-10-08
UHLMAN, COLE
Executed: 2019-10-07
Assignee
INTEL CORPORATION
2200 MISSION COLLEGE BLVD, SANTA CLARA, CALIFORNIA, 95054
Covered Property (1)
Method and Apparatus to Improve Read Latency of a Multi-Threshold Level Cell Block-Based Non-Volatile Memory
Application: 16/586,214 →
Publication: US 2020/0027503
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Jan 19, 2023
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP.
Reel/Frame 063815/0490 →