IP Library Assignment 053031/0650
Patent Assignment
Reel/Frame 053031/0650

ASSIGNMENT OF ASSIGNOR'S INTEREST

Recorded: 2020-06-24 Received: 2020-06-24 Pages: 5
Assignors
DECOBERT, CATHERINE
Executed: 2020-06-17
BERTELLO, BERNARD
Executed: 2020-06-18
FESTES, GILLES
Executed: 2020-06-18
VILLARD, BRUNO
Executed: 2020-06-18
CUEVAS, ELIZABETH
Executed: 2020-06-22
DO, NHAN
Executed: 2020-06-22
GHAZAVI, PARVIZ
Executed: 2020-06-22
KIM, JINHO
Executed: 2020-06-22
THIERY, JEAN FRANCOIS
Executed: 2020-06-22
TKACHEV, YURI
Executed: 2020-06-22
Assignee
SILICON STORAGE TECHNOLOGY, INC.
450 HOLGER WAY, SAN JOSE, CA, 95134, UNITED STATES
Covered Application (1)
Method Of Forming Split Gate Memory Cells With Thinned Side Edge Tunnel Oxide
App. No. 16/910,022