Patent Assignment
Reel/Frame 060187/0822
Assignment of Assignor's Interest
Recorded: 2022-06-14
Pages: 5
Assignors
J, RAJA PRABHU
Executed: 2022-06-13
SEEDHER, ANKIT
Executed: 2022-06-13
SRIDHARAN, SRINATH
Executed: 2022-06-13
GUPTA, RAKESH KUMAR
Executed: 2022-06-13
NAIDU, NITESH
Executed: 2022-06-13
AGRAWAL, SHIVAM
Executed: 2022-06-13
G, JEEVABHARATHI
Executed: 2022-06-13
CHOUDHARY, PURVA
Executed: 2022-06-13
Assignee
SHAOXING YUANFANG SEMICONDUCTOR CO., LTD.
ROOM 203, 204 AND 206, 2ND FLOOR, BUILDING 3, NO.326 YINQIAO ROAD,GAOBU STREET,YUECHENG DISTRICT, SHAOXING, ZJ, CHINA
Covered Property
(1)
Generating Divided Signals from Phase-Locked Loop (Pll) Output When Reference Clock Is Unavailable
Related Assignments
(1)
Other recorded transfers of the patent in this record — the chain of ownership.