Patent Assignment
Reel/Frame 070467/0155
Change of Name
Recorded: 2025-03-10
Pages: 4
Assignor
XCELSIS CORPORATION
Executed: 2022-08-15
Assignee
ADEIA SEMICONDUCTOR INC.
3025 ORCHARD PARKWAY, SAN JOSE, CALIFORNIA, 95134
Covered Property
(1)
Transistor Level Interconnection Methodologies Utilizing 3D Interconnects
Application:
19/072,935 →
Publication:
US 2025/0204006
Related Assignments
(2)
Other recorded transfers of the patent in this record — the chain of ownership.