Patent Assignment
Reel/Frame 074709/0686
CORRECTIVE ASSIGNMENT TO CORRECT THE APPLICATION NO. 14204254 TO 14205254 PREVIOUSLY RECORDED ON REEL 33887 FRAME 923. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST.
Recorded: 2026-01-12
Received: 2026-01-12
Pages: 10
Assignor
UNIQUIFY, INC.
Executed: 2014-10-03
Assignee
MONTAGE CAPITAL II, L.P.
19925 STEVENS CREEK BLVD., SUITE 100, CUPERTINO, CA, 95014, UNITED STATES
Covered Applications
(13)
CONTINUOUS ADAPTIVE TRAINING FOR DATA INTERFACE TIMING CALIBRATION
App. No. 14/205,208
→
METHOD FOR OPERATING A CIRCUIT INCLUDING A TIMING CALIBRATION FUNCTION
App. No. 14/205,254
→
DATA INTERFACE CIRCUIT FOR CAPTURING RECEIVED DATA BITS INCLUDING CONTINUOUS CALIBRATION
App. No. 14/205,239
→
METHOD FOR OPERATING A DATA INTERFACE CIRCUIT WHERE A CALIBRATION CONTROLLER CONTROLS BOTH A MISSION PATH AND A REFERENCE PATH
App. No. 14/205,225
→
Method of Application Memory Preservation for Dynamic Calibration of Memory Interfaces
App. No. 14/152,807
→
Application Memory Preservation for Dynamic Calibration of Memory Interfaces
App. No. 14/152,902
→
MEMORY INTERFACE CIRCUITS INCLUDING CALIBRATION FOR CAS LATENCY COMPENSATION IN A PLURALITY OF BYTE LANES
App. No. 14/081,806
→
METHODS FOR OPERATING A MEMORY INTERFACE CIRCUIT INCLUDING CALIBRATION FOR CAS LATENCY COMPENSATION IN A PLURALITY OF BYTE LANES
App. No. 14/081,897
→
Dynamically Calibrated DDR Memory Controller
App. No. 14/023,630
→
DYNAMICALLY ADAPTIVE BIT-LEVELING FOR DATA INTERFACES
App. No. 13/797,200
→
CONTINUOUS ADAPTIVE TRAINING FOR DATA INTERFACE TIMING CALIBRATION
App. No. 61/777,648
→
DYNAMICALLY CALIBRATED DDR MEMORY CONTROLLER
App. No. 13/172,740
→
DDR MEMORY CONTROLLER
App. No. 12/157,081
→