IP Library Assignment 074820/0828
Patent Assignment
Reel/Frame 074820/0828

Security Interest

Recorded: 2026-06-02 Pages: 10
Assignor
ALTERA CORPORATION
Executed: 2026-06-01
Assignee
BARCLAYS BANK PLC, AS COLLATERAL AGENT
400 JEFFERSON PARK, WHIPPANY, NEW JERSEY, 07891
Covered Properties (21)
Programmable Logic Device Simulations
Application: 19/437,547 →
Publication: US US20260134182A1
Clock Gating and Clock Scaling Based on Runtime Application Task Graph Information
Application: 19/386,917 →
Publication: US US20260072659A1
Unified High Voltage Receiver
Application: 19/329,464 →
Publication: US US20260005661A1
Antenna Hopping for Specific Absorption Rate (Sar) Reduction
Application: 19/370,851 →
Publication: US US20260052484A1
Systems and Methods for a Dynamic Scoping System for FPGA Design Tools and Output Files
Application: 19/376,474 →
Publication: US US20260056961A1
Systems and Methods for a Context-Aware Retrieval System for FPGA Design Implementation and Closure Processes
Application: 19/376,461 →
Publication: US US20260057184A1
Signed Data Structure Pre-Authentication for Integrated Circuit Device
Application: 19/465,878 →
Publication: US US20260205303A1
Systems and Methods for Enhancing Security for Multi-Tenant FPGA Operations
Application: 19/416,846 →
Publication: US US20260099634A1
Self Startup Bandgap Circuit
Application: 19/340,707 →
Publication: US US20260023405A1
Techniques for Adaptive Image Denoising
Application: 19/399,258 →
Publication: US US20260080516A1
Chiplet Interconnect for High Bandwidth Memory Devices
Application: 19/341,937 →
Publication: US US20260030197A1
Load Balancing for Multi-Stream Communication Interfaces
Application: 19/337,604 →
Publication: US US20260019368A1
Systems and Methods for a Cross-Referencing System for FPGA Documentation, Design Reports, Source Code, and Chat History
Application: 19/376,466 →
Publication: US US20260057260A1
Integrated Circuit Device Recommendation System for Electronic System Architectures
Application: 19/374,422 →
Publication: US US20260057156A1
Dynamic Performance Rate Limiter for Integrated Circuit Device
Application: 19/437,684 →
Publication: US US20260126482A1
Systems and Methods for a FPGA Design History Integration System for Iterative Development
Application: 19/376,497 →
Publication: US US20260170216A1
Programmable DMA Architecture for QOS Support
Application: 19/342,075 →
Publication: US US20260023702A1
Self-Isolated Analog Circuit
Application: 19/432,095 →
Publication: US US20260121637A1
Techniques For Thermal And Power Management In Integrated Circuits
Application: 19/336,448 →
Publication: US US20260016873A1
Dual Port Random-Access-Memory Circuitry
Patent: 7,471,588 →
Application: 11/506,254 →
Publication: US US20070258313A1
Segment-Based Encoding System Including Segment-Specific Metadata
Patent: 9,547,916 →
Application: 11/452,087 →
Publication: US US20060256852A1
Related Assignments (16)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Jul 24, 2006
From: PTS CORPORATION
To: ALTERA CORPORATION
Reel/Frame 018132/0508 →
Assignment of Assignor's Interest Aug 18, 2006
From: YU, HAIMING; NGAI, TONY K.; CHOE, KOK HENG
To: ALTERA CORPORATION
Reel/Frame 018193/0527 →
Assignment of Assignor's Interest Sep 15, 2025
From: SAMUEL, PREM KUMAR
To: ALTERA CORPORATION
Reel/Frame 072260/0908 →
Assignment of Assignor's Interest Sep 15, 2025
From: CHEW, SOONG KHIM
To: ALTERA CORPORATION
Reel/Frame 072260/0855 →
Assignment of Assignor's Interest Sep 15, 2025
From: LEE, SENG SIONG
To: ALTERA CORPORATION
Reel/Frame 072260/0873 →
Assignment of Assignor's Interest Sep 24, 2025
From: NG, WEI CHUI; KHAMKAR, VAIBHAV
To: ALTERA CORPORATION
Reel/Frame 072356/0407 →
Assignment of Assignor's Interest Oct 14, 2025
From: XIAO, PING
To: ALTERA CORPORATION
Reel/Frame 072561/0599 →
Assignment of Assignor's Interest Oct 14, 2025
From: YELLEPEDDI, MANEESHA
To: ALTERA CORPORATION
Reel/Frame 072561/0655 →
Assignment of Assignor's Interest Oct 14, 2025
From: MOHAMED ASLAM, AHMAD SAMHAN
To: ALTERA CORPORATION
Reel/Frame 072561/0557 →
Assignment of Assignor's Interest Oct 14, 2025
From: KELKAR, ADITYA
To: ALTERA CORPORATION
Reel/Frame 072561/0462 →
Assignment of Assignor's Interest Oct 15, 2025
From: SIMMADHARI RAMADASS, KRISHNA KUMAR; PAPADONIKOLAKIS, MARKOS
To: ALTERA CORPORATION
Reel/Frame 072576/0967 →
Assignment of Assignor's Interest Oct 29, 2025
From: AP, SANTHOSH; SREENIVASAREDDY, MADHUKIRAN; AAGIRU, VAMSHI KRISHNA; ANANDA, NITHESHA
To: INTEL CORPORATION
Reel/Frame 073419/0652 →
Assignment of Assignor's Interest Oct 29, 2025
From: INTEL CORPORATION
To: ALTERA CORPORATION
Reel/Frame 072710/0176 →
Assignment of Assignor's Interest Dec 3, 2025
From: VARADARAJAN, KRISHNAKUMAR; FEEKES, DANNIE
To: ALTERA CORPORATION
Reel/Frame 073106/0834 →
Assignment of Assignor's Interest Feb 12, 2026
From: GENEST, GILDAS
To: ALTERA CORPORATION
Reel/Frame 073765/0240 →
Assignment of Assignor's Interest Mar 27, 2026
From: YILDIZ, NERHUN; DRIES, WILLIAM
To: ALTERA CORPORATION
Reel/Frame 074206/0715 →