IP Library › Granted Patent US 10,103,074
Granted Patent B2
US 10,103,074 · App. 15/073,009 · Granted Oct 16, 2018

Method to improve analog fault coverage using test diodes

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,103,074
App. No.
15/073,009
Filed
Mar 17, 2016
Granted
Oct 16, 2018
Kind
B2
Art Unit
2868
USPC
324/762.07
Abstract

Implementations of integrated circuits may include: one or more diodes each having an anode and a cathode, each of the one or more diodes may be coupled with a voltage domain. One or more test pins may be coupled with one or more diodes. The test pins may be configured to be coupled to a tester. The one or more diodes may be positioned on one or more internal analog nodes to detect the presence of one or more analog faults. The one or more diodes may be configured to remain inactive during regular operation of the integrated circuit.

Claims (36)

1. An integrated circuit comprising:

one or more diodes each comprising an anode and a cathode, each of the one or more diodes coupled with a voltage domain; and

one or more test pins coupled with the one or more diodes;

wherein the test pins are configured to be coupled to a tester,

wherein the one or more diodes are not part of the tester and the tester is not part of the integrated circuit;

wherein the one or more diodes are positioned on one or more internal analog nodes to detect the presence of one or more analog faults; and

wherein the one or more diodes physically remain in the integrated circuit after detection and are configured to remain inactive during regular operation of the integrated circuit.

2. The integrated circuit of claim 1 , wherein the one or more diodes are transistors.

3. The integrated circuit of claim 1 , wherein the one or more diodes are not active components of the integrated circuit and are not activated after testing of the integrated circuit.

4. An integrated circuit comprising:

one or more diodes each having an anode and a cathode, the one or more diodes coupled to one or more internal analog nodes; and

a test pin coupled to the one or more diodes;

wherein when a test voltage is applied to the test pin, a flow of current at the one or more diodes detects the presence of a fault at the one or more internal analog nodes;

wherein the test voltage is not generated by the integrated circuit; and

wherein the one or more diodes physically remain in the integrated circuit after application of the test voltage and are configured to remain inactive during regular operation of the integrated circuit.

5. The integrated circuit of claim 4 , wherein the one or more diodes are transistors.

6. The integrated circuit of claim 4 , wherein the one or more diodes are not active components of the integrated circuit and are not activated after testing of the integrated circuit.

7. The integrated circuit of claim 4 , wherein the anodes of the one or more diodes are coupled together within a single voltage domain; and

wherein when the test voltage is applied to the test pin, the flow of current at the anodes detects the presence of the fault and the fault is a pull-down fault.

8. The integrated circuit of claim 4 , wherein the cathodes of the one or more diodes are coupled together within a single voltage domain; and

wherein when the test voltage is applied to the test pin, the flow of current at the cathodes detects the presence of the fault, and the fault is a pull-up fault.

9. A method for designing an analog testing circuit for an integrated circuit, the method comprising:

coupling one or more diodes each having an anode and a cathode, the one or more diodes coupled to one or more internal analog nodes;

coupling one or more test pins to the one or more diodes; and

when a test voltage is applied to the one or more test pins, detecting a fault by the flow of current at the one or more diodes;

wherein the test voltage is not generated by the integrated circuit;

wherein the one or more diodes physically remain in the integrated circuit after application of the test voltage and are not activated during normal operation of the integrated circuit.

10. The integrated circuit of claim 9 , wherein the one or more diodes are transistors.

11. The integrated circuit of claim 9 , wherein the one or more diodes are not active components of the integrated circuit and are not activated again after testing of the integrated circuit.

12. A method for testing for the presence of analog faults in an integrated circuit, the method comprising:

providing one or more diodes each having an anode and a cathode, the one or more diodes coupled to one or more internal analog nodes, all operably coupled with a test pin;

applying a potential across the diodes to generate a current;

if a pull-up fault exists, then detecting the current at the cathode;

if a pull-down fault exists, then detecting the current at the anode;

wherein the potential is not generated by the integrated circuit;

wherein the one or more diodes are physically remain in the integrated circuit and are not an active component of the integrated circuit and are not activated again after testing of the integrated circuit.