IP Library Granted Patent US 10,164,099
Granted Patent B2
US 10,164,099 · App. 15/889,367 · Granted Dec 25, 2018

Device with diffusion blocking layer in source/drain region

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Quick Facts
Patent No.
US 10,164,099
App. No.
15/889,367
Filed
Feb 6, 2018
Granted
Dec 25, 2018
Kind
B2
Examiner
NARAGHI, ALI
Art Unit
2896
USPC
257/77
Abstract

One illustrative device disclosed herein includes, among other things, a fin defined on a substrate. A gate electrode structure is positioned above the fin in a channel region. A source/drain region is defined in the fin. The source/drain region includes a first epitaxial semiconductor material. The first epitaxial semiconductor material includes a dopant species having a first concentration. A diffusion blocking layer is positioned above the first epitaxial semiconductor material. A second epitaxial semiconductor material is positioned above the diffusion blocking layer. The second epitaxial semiconductor material includes the dopant species having a second concentration greater than the first concentration.

Claims (11)

1. A device, comprising: a fin defined on a substrate; a gate electrode structure positioned above said fin in a channel region; and a source/drain region defined in said fin, comprising: a first epitaxial semiconductor material, wherein said first epitaxial semiconductor material comprises a dopant species having a first concentration; a diffusion blocking layer positioned above said first epitaxial semiconductor material; and a second epitaxial semiconductor material positioned above said diffusion blocking layer, wherein said second epitaxial semiconductor material comprises said dopant species having a second concentration greater than said first concentration, wherein said dopant species comprises an N-type dopant species, wherein said diffusion blocking layer comprises said dopant species having a third concentration less than said second concentration.

2. The device of claim 1 , wherein said diffusion blocking layer comprises a silicon alloy layer.

3. The device of claim 2 , wherein said silicon alloy layer comprises a silicon carbon layer.

4. The device of claim 1 , wherein a top surface of said diffusion blocking layer is disposed at a height greater than a height of a top surface of said fin in said channel region.

5. The device of claim 1 , wherein a bottom surface of said second epitaxial semiconductor material is disposed at a height greater than a height of a top surface of said fin in said channel region.

6. A device, comprising: a fin defined on a substrate; a gate electrode structure positioned above said fin in a channel region; and a source/drain region defined in said fin, comprising: a first epitaxial semiconductor material, wherein said first epitaxial semiconductor material comprises a dopant species having a first concentration; a diffusion blocking layer comprising silicon carbon positioned above said first epitaxial semiconductor material, wherein a top surface of said diffusion blocking layer is disposed at a height greater than a height of a top surface of said fin in said channel region; and a second epitaxial semiconductor material positioned above said diffusion blocking layer, wherein said second epitaxial semiconductor material comprises said dopant species having a second concentration greater than said first concentration, wherein said dopant species comprises an N-type dopant species, wherein said diffusion blocking layer comprises said dopant species having a third concentration less than said second concentration.

7. The device of claim 6 , wherein said diffusion blocking layer comprises a silicon alloy layer.

8. The device of claim 6 , wherein a bottom surface of said second epitaxial semiconductor material is disposed at a height greater than a height of a top surface of said fin in said channel region.

9. A device, comprising: a fin defined on a substrate; a gate electrode structure positioned above said fin in a channel region; and a source/drain region defined in said fin, comprising: a first epitaxial semiconductor material, wherein said first epitaxial semiconductor material comprises a dopant species having a first concentration; a diffusion blocking layer positioned above said first epitaxial semiconductor material, wherein a top surface of said diffusion blocking layer is disposed at a height greater than a height of a top surface of said fin in said channel region; and a second epitaxial semiconductor material positioned above said diffusion blocking layer, wherein said second epitaxial semiconductor material comprises said dopant species having a second concentration greater than said first concentration, and a bottom surface of said second epitaxial semiconductor material is disposed at a height greater than a height of a top surface of said fin in said channel region, wherein said dopant species comprises an N-type dopant species, wherein said diffusion blocking layer comprises said dopant species having a third concentration less than said second concentration.

10. The device of claim 9 , wherein said diffusion blocking layer comprises a silicon alloy layer.

11. The device of claim 10 , wherein said silicon alloy layer comprises a silicon carbon layer.