IP Library Granted Patent US 10,473,710
Granted Patent B2
US 10,473,710 · App. 14/926,257 · Granted Nov 12, 2019

Desaturation detection circuit and desaturation circuit monitoring function

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Quick Facts
Patent No.
US 10,473,710
App. No.
14/926,257
Filed
Oct 29, 2015
Granted
Nov 12, 2019
Kind
B2
Art Unit
2867
USPC
324/762.08
Abstract

Systems, circuits, and chips for protecting transistors and circuits containing transistors are provided. As an example, a transistor (e.g., an Insulated-Gate Bipolar Transistor (IGBT)) monitoring system is disclosed to include an IGBT desaturation detection circuit that is configured to check and monitor desaturation functionality of the IGBT before startup of the IGBT as well as during operation of the IGBT.

Claims (37)

1. A circuit, comprising:

at least one Insulated-Gate Bipolar Transistor (IGBT) having a gate, collector, and emitter;

a detector circuit coupled to the IGBT and including an output that outputs a driver current for the IGBT based on a signal detected by the detector circuit;

an IGBT desaturation detection circuit coupled to the output of the detector circuit and that checks and monitors desaturation functionality of the IGBT before startup of the IGBT and during operation of the IGBT, wherein the IGBT desaturation detection circuit comprises a blanking capacitor discharge circuit that includes a blanking capacitor that is active during a transition of the IGBT from an off state to an on state; and

a delay circuit coupled between the gate of the IGBT and the output of the detector circuit and that delays the transition of the IGBT from the off state to the on state by a delay period to test functionality of the IGBT desaturation detection circuit.

2. The circuit of claim 1 , wherein the IGBT desaturation detection circuit comprises a current source coupled to a comparator to detect the desaturation functionality of the IGBT.

3. The circuit of claim 1 , wherein the IGBT desaturation detection circuit is active while the IGBT is in the on state and wherein the IGBT desaturation detection circuit is also active while the IGBT is transitioning from the on state to the off state.

4. The circuit of claim 3 , wherein the IGBT desaturation detection circuit is deactivated between a time immediately before and immediately following a transition of the IGBT from the off state to the on state.

5. The circuit of claim 1 , further comprising:

a pulse generator coupled to the output of the detector circuit and that controls a discharge period for the blanking capacitor according to a rising edge of an IGBT turn-on signal.

6. The circuit of claim 5 , wherein a width of a pulse produced by the pulse generator is wide enough to ensure that the blanking capacitor is fully discharged and as to provide transient noise rejection for the IGBT during the on state.

7. The circuit of claim 1 , wherein the IGBT desaturation detection circuit is fully functional before the IGBT begins transitioning from the off state to the on state and wherein the delay period is less than a blanking period of the blanking capacitor.

8. The circuit of claim 1 , wherein the IGBT desaturation detection circuit comprises logic that produces a desaturation overload signal and a signal indicative of a failure in the IGBT desaturation detection circuit.

9. The circuit of claim 1 , further comprising:

an over temperature circuit that monitors a temperature condition of the IGBT and disables the IGBT in response to determining that the temperature condition has exceeded a predetermined temperature threshold.

10. The circuit of claim 9 , wherein when the IGBT is in the off state, a pull down circuit is used to artificially cause a drop in a measured temperature sense voltage for monitoring the temperature condition.

11. The circuit of claim 1 , further comprising:

an over current detection circuit using an emitter sense resistor and comparator circuit.

12. The circuit of claim 11 , wherein when the IGBT is in the off state, a current source is switched to the emitter sense resistor which causes an over current condition.

13. An Insulated-Gate Bipolar Transistor (IGBT) monitoring system, comprising:

a detector circuit including an output that outputs a driver current for an IGBT based on a signal detected by the detector circuit;

an IGBT desaturation detection circuit that checks and monitors desaturation functionality of the IGBT before startup of the IGBT and during operation of the IGBT; and

a delay circuit coupled between the IGBT and the output of the detector circuit and that delays the startup of the IGBT by a delay period to test functionality of the IGBT desaturation detection circuit.

14. The IGBT monitoring system of claim 13 , wherein the IGBT desaturation detection circuit comprises a current source and comparator that are used to detect the desaturation functionality of the IGBT, wherein the IGBT desaturation detection circuit is active while the IGBT is in an on state and wherein the IGBT desaturation detection circuit is also active while the IGBT is transitioning from the on state to an off state.

15. The monitoring system of claim 14 , wherein the IGBT desaturation detection circuit is deactivated between a time immediately before and immediately following a transition of the IGBT from the off state to the on state.

16. The IGBT monitoring system of claim 13 , further comprising:

an over temperature circuit that monitors a temperature condition of the IGBT and disables the IGBT in response to determining that the temperature condition has exceeded a predetermined temperature threshold, wherein when the IGBT is in an off state, a pull down circuit is used to artificially cause a drop in a measured temperature sense voltage for monitoring the temperature condition.

17. The IGBT monitoring system of claim 16 , further comprising:

logic that produces a desaturation overload signal and a signal indicative of a failure in the IGBT desaturation detection circuit, wherein the logic further produces a signal indicative of a failure in the over temperature circuit.

18. The IGBT monitoring system of claim 13 , wherein the IGBT desaturation detection circuit comprises a blanking capacitor discharge circuit that includes a blanking capacitor that is active during a transition of the IGBT from an off state to an on state.

19. An isolation system, comprising:

a first circuit operating at a first voltage;

a second circuit operating at a second voltage, wherein the second circuit receives information from the first circuit across an isolation boundary that inhibits electrical communication between the first circuit and second circuit;

an Insulated-Gate Bipolar Transistor (IGBT) having a gate, collector, and emitter in electrical communication with the second circuit;

a desaturation detection circuit that checks and monitors desaturation functionality of the IGBT before startup of the IGBT and during operation of the IGBT; and

a delay circuit coupled to the gate of the IGBT and that delays the startup of the IGBT by a delay period to test functionality of the desaturation detection circuit.

20. The isolation system of claim 19 , wherein the information received at the second circuit from the first circuit is communicated via at least one of optical signals, capacitive coupling, and inductive coupling.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE OF THE MERGER AND APPLICATION NOS. 13/237,550 AND 16/103,107 FROM THE MERGER PREVIOUSLY RECORDED ON REEL 047231 FRAME 0369. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048549/0113 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047231/0369 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2015
From: SULLIVAN, PATRICK
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 036923/0404 →