IP Library › Granted Patent US 10,707,411
Granted Patent B1
US 10,707,411 · App. 16/425,366 · Granted Jul 7, 2020

MRAM structure for efficient manufacturability

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Quick Facts
Patent No.
US 10,707,411
App. No.
16/425,366
Filed
May 29, 2019
Granted
Jul 7, 2020
Kind
B1
Art Unit
2824
USPC
257/421
Abstract

A semiconductor device comprises a first conductive material, a contact, an a magnetic tunneling junction positioned between the first conductive material and the contact. The semiconductor device further comprises a spacer that is positioned between the first conductive material and the contact and surrounds at least a portion of the magnetic tunneling junction. The spacer comprises spacer material that has at least some etch selectivity compared to a dielectric material that surrounds at least a portion of the first conductive material.

Claims (14)

1. A method of manufacturing a semiconductor device, the method comprising:

forming a spacer surrounding at least a portion of a magnetic tunneling junction by depositing a spacer material to at least a region of a contact that is adjacent to the magnetic tunneling junction;

after forming the spacer, depositing an etch stop material onto the spacer and the magnetic tunneling junction to directly contact an upper surface of a storage layer of the magnetic tunneling junction;

depositing a dielectric material directly onto the etch stop material, wherein the spacer material has at least some etch selectivity compared to the dielectric material;

removing a portion of the dielectric material that is proximate to the magnetic tunneling junction and the spacer to form a trench; and

depositing a first conductive material into the trench.

2. The method of claim 1 , wherein a loading effect causes a first portion of the etch stop material that is adjacent to the spacer to remain after a second portion of the etch stop material is removed.

3. The method of claim 1 , wherein the etch stop material has at least some etch selectivity compared to the dielectric material and at least some etch selectivity compared to the spacer material.

4. The method of claim 3 , wherein the etch stop material comprises silicon carbon nitride.

5. The method of claim 1 , wherein the dielectric material comprises silicon dioxide, and the spacer material comprises silicon nitride.

6. The method of claim 1 , wherein the spacer surrounds portions of sidewalls of the magnetic tunneling junction.

7. The method of claim 1 , wherein a first portion of the spacer that is proximate to a fixed layer of the magnetic tunneling junction is thicker than a second portion of the spacer that is proximate to the storage layer of the magnetic tunneling junction.

8. The method of claim 7 , wherein, after depositing the first conductive material into the trench, a surface of the storage layer contacts the first conductive material.

9. The method of claim 7 , wherein a surface of the fixed layer contacts the contact.