Open channel vector command execution

1. A device, comprising:

a memory; and

a controller communicatively coupled to the memory, wherein the controller is configured to:

fetch a command from a host computing device;

determine the fetched command is a vector command, wherein the determination is based on whether the fetched command comprises a field configured to communicate a list of scatter-gather logical block addresses;

identify a set of physical addresses in the vector command fetched from the host computing device, wherein each physical address of the set of physical addresses corresponds to a location in the memory;

generate a set of non-vector commands, wherein each non-vector command in the set of non-vector commands corresponds to one of each physical address in the set of physical addresses;

execute the set of non-vector commands; and

generate a message to the host computing device indicating completion of the vector command in response to the execution of the set of non-vector commands.

2. A device, comprising:

a memory; and

a controller communicatively coupled to the memory, wherein the controller is configured to:

fetch meta-data from a host computing device, wherein the meta-data comprises a list of physical addresses;

identify a set of physical addresses in a vector command fetched from a host computing device, wherein each physical address of the set of physical addresses corresponds to a location in the memory;

generate a set of non-vector commands, wherein each non-vector command in the set of non-vector commands corresponds to one of each physical address in the set of physical addresses;

execute the set of non-vector commands; and

generate a message to the host computing device indicating completion of the vector command in response to the execution of the set of non-vector commands.

3. The device of claim 2 , wherein the vector command comprises a pointer configured to identify the set of physical addresses in the list of physical addresses in the meta-data.

4. The device of claim 2 , wherein the set of physical addresses comprises two or more physical addresses.

5. A device, comprising:

a memory;

a command register comprising a plurality of 1-bit slots; and

a controller communicatively coupled to the memory and the command register, wherein the controller is configured to:

determine whether the command register comprises an available slot;

fetch a command from a host computing device if the command register comprises the available slot;

identify a set of physical addresses in a vector command fetched from a host computing device, wherein each physical address of the set of physical addresses corresponds to a location in the memory;

generate a set of non-vector commands, wherein each non-vector command in the set of non-vector commands corresponds to one of each physical address in the set of physical addresses;

execute the set of non-vector commands; and

generate a message to the host computing device indicating completion of the vector command in response to the execution of the set of non-vector commands.

6. The device of claim 5 , wherein the controller is further configured to execute one non-vector command of the set of non-vector commands for each available slot in the command register.

7. The device of claim 5 , wherein the memory comprises an open-channel solid state drive (SSD) memory device.

8. The device of claim 1 , wherein each non-vector command in the set of non-vector commands shares at least one of a write, read, copy, or reset command with the vector command.

9. A device, comprising:

a memory; and

a controller communicatively coupled to the memory, wherein the controller is configured to:

receive an indication that the memory has executed a non-vector command, wherein the non-vector command is one of a plurality of non-vector commands corresponding to a vector command received from a host computing device;

determine whether the memory has executed all of the plurality of non-vector commands corresponding to the vector command;

store the indication that the memory has executed the non-vector command if the memory has not executed all of the plurality of non-vector commands corresponding to the vector command;

generate a completion message indicating execution of the vector command if the memory has executed each of the plurality of non-vector commands; and

transmit the completion message to the host computing device.

10. A device, comprising:

a memory; and

a controller communicatively coupled to the memory, wherein the controller is configured to:

receive an indication that the memory has executed a non-vector command, wherein the non-vector command is one of a plurality of non-vector commands corresponding to a vector command received from a host computing device;

receive a plurality of indications that the memory has executed a non-vector command, wherein each of the plurality of indications correspond to one of the plurality of non-vector commands;

store the plurality of indications;

determine whether the memory has executed all of the plurality of non-vector commands corresponding to the vector command;

generate a completion message indicating execution of the vector command if the memory has executed each of the plurality of non-vector commands;

transmit the completion message to the host computing device; and

clear the stored plurality of indications after transmission of the completion message to the host computing device.

11. The device of claim 10 , wherein each of the plurality of non-vector commands comprises one of a plurality of physical addresses contained in the vector command.

12. The device of claim 10 , wherein the controller is further configured to hold a completion request until all requests in a vector command have been completed.

13. The device of claim 10 , wherein each of the plurality of non-vector commands is configured to be executed in a sequential order by the memory.

14. The device of claim 9 , wherein each of the plurality of non-vector commands shares at least one of a write, read, copy, or reset command with the vector command.

15. The device of claim 9 , wherein the memory comprises an open-channel non-volatile memory.

16. An apparatus, comprising:

means for receiving a vector command from a host device, wherein the vector command comprises a set of physical addresses;

means for fetching meta-data from the host computing device, wherein the meta-data comprises a list of physical addresses, and wherein the vector command comprises a pointer configured to identify the set of physical addresses in the list of physical addresses in the meta-data;

means for generating a set of non-vector commands, wherein each non-vector command in the set of non-vector commands corresponds to one of each physical address in the set of physical addresses, and wherein each non-vector command in the set of non-vector commands is configured to be executed by a means for storing digital data; and

means for generating a message to the host computing device indicating completion of the vector command in response to the execution of the set of non-vector commands by the means for storing digital data.

17. An apparatus, comprising:

means for determining whether a command register comprises an available slot, wherein the command register comprises a plurality of 1-bit slots;

means for fetching a command from the host computing device if the command register comprises the available slot;

means for receiving a vector command from a host device, wherein the vector command comprises a set of physical addresses;

means for generating a set of non-vector commands, wherein each non-vector command in the set of non-vector commands corresponds to one of each physical address in the set of physical addresses, and wherein each non-vector command in the set of non-vector commands is configured to be executed by a means for storing digital data; and

means for generating a message to the host computing device indicating completion of the vector command in response to the execution of the set of non-vector commands by the means for storing digital data.

18. The device of claim 1 , wherein the controller is further configured to:

determine which non-vector command of the set of non-vector commands has been executed; and

aggregate the executed non-vector commands of the set of non-vector commands.

19. The device of claim 10 , wherein each of the plurality of non-vector commands is configured to be generated based on at least one of an order of a physical address list, a structure of the device, and a resource availability.

20. The apparatus of claim 17 , wherein the means for determining whether a command register comprises an available slot further comprises means for determining if a slot of the command register comprises a bit.