IP Library Granted Patent US 11,210,031
Granted Patent B1
US 11,210,031 · App. 16/923,849 · Granted Dec 28, 2021

Thermal region tags and thermal region outlier detection

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Quick Facts
Patent No.
US 11,210,031
App. No.
16/923,849
Filed
Jul 8, 2020
Granted
Dec 28, 2021
Kind
B1
Art Unit
2112
USPC
714/718
Abstract

A method, device, and system for improving read performance in frequently changing device temperature conditions through detecting thermal region tags and thermal region outliers in a memory device. A plurality of thermal regions may be configured for the memory device. A first temperature may be measured corresponding to opening a storage block of the memory device for programming. A second temperature may then be measured corresponding to closing the storage block for programming. A range between the first temperature and the second temperature may be determined. The range may span N≥2 of the thermal regions. Finally, the storage block may be assigned to a thermal region that includes the second temperature, on condition that N satisfies a threshold.

Claims (59)

1. A method, comprising:

measuring a first temperature corresponding to opening a storage block of the memory device for programming;

measuring a second temperature corresponding to closing the storage block for programming;

determining a range between the first temperature and the second temperature, the range spanning N≥2 pre-configured thermal regions; and

assigning the storage block to a thermal region that includes the second temperature, on condition that N satisfies a threshold.

2. The method of claim 1 , further comprising:

marking the storage block as a thermal outlier block if N does not satisfy the threshold.

3. The method of claim 2 , wherein marking the storage block as the thermal outlier block triggers evacuation of data from the storage block.

4. The method of claim 1 , further comprising:

tracking a temperature of the block while the block is open for programming;

determining one or more of a number of cross-temperature events, a temperature range of one or more cross-temperature event, and a frequency of cross-temperature events; and

marking the storage block as a thermal outlier block conditionally based on one or more of the number of cross-temperature events, the temperature range of one or more cross-temperature event, and the frequency of cross-temperature events.

5. The method of claim 1 , wherein read parameters to apply to storage blocks assigned to a particular thermal region are applied particularly to blocks assigned to the particular thermal region.

6. The method of claim 5 , wherein the thermal regions are configured such that for at least a subset M≥2 of the thermal regions, the read parameters for any N adjacent thermal regions of the subset M are compatible.

7. A device, comprising:

a non-volatile memory array;

a controller; and

first logic to configure the controller to:

measure a first temperature corresponding to opening a storage block of the non-volatile memory array for programming, the first temperature located within a first of a plurality of pre-configured thermal regions;

measure a second temperature corresponding to closing the storage block for programming, the second temperature located within a second of the plurality of pre-configured thermal regions in an N-hop neighborhood of the first of the pre-configured thermal regions, where N≥1; and

assign the storage block to the second of the pre-configured thermal regions;

wherein the plurality of pre-configured thermal regions are configured such that memory read parameters for thermal regions in the N-hop neighborhood are compatible.

8. The device of claim 7 , further comprising second logic to:

detect a cross-temperature event; and

update the read parameters for one or more of the pre-configured thermal regions as a result of the cross-temperature event.

9. The device of claim 8 , wherein the update of the read parameters is conditioned on the cross-temperature event being an extreme cross-temperature event.

10. The device of claim 7 , further comprising third logic to:

detect a cross-temperature event;

test a bit error rate for a storage block closed after the cross-temperature event; and

distinguish the storage block closed after the cross-temperature event from a storage block closed before the cross-temperature event, wherein the storage block closed after the cross-temperature event and the storage block closed before the cross-temperature event are assigned to a same thermal region.

11. The device of claim 10 , wherein the bit error rate test is performed on condition that the storage block closed after the cross-temperature event is a first closed storage block, after the cross-temperature event, and the storage block closed after the cross-temperature event is assigned to the same thermal region as the storage block closed before the cross-temperature event.

12. The device of claim 10 , wherein distinguishing the storage block closed after the cross-temperature event from the storage block closed before the cross-temperature event comprises:

creating a new thermal region tag including the same thermal region assigned to the storage block closed before the cross-temperature event;

assigning the storage block closed after the cross-temperature event to the new thermal region tag; and

marking the new thermal region tag to invoke additional read verification on storage blocks associated with the new thermal region tag.

13. The device of claim 10 , further comprising fourth logic to:

deactivate the thermal region tag of the block programmed before the cross-temperature event, such that storage blocks closed after the cross-temperature event cannot be assigned to the thermal region tag of the storage block closed before the cross-temperature event.

14. The device of claim 10 , wherein the bit error rate test and distinguishing comprise:

applying read parameters assigned to the storage block closed before the cross-temperature event to read data from the storage block closed after the cross-temperature event;

comparing bit error rates for the storage block closed before the cross-temperature event and the storage block closed after the cross-temperature event; and

distinguishing the storage block closed after the cross-temperature event from the storage block closed before the cross-temperature event on condition that the comparing satisfies a threshold.

15. The device of claim 10 , wherein distinguishing the storage block closed after the cross-temperature event from the storage block closed before the cross-temperature event is independent of a time interval of the cross-temperature event.

16. A system, comprising:

a memory array; and

a controller configured to:

measure a first temperature when a block of the memory array is opened;

measure a second temperature when the block is closed;

assign the block a tag corresponding to one of a plurality of pre-configured thermal regions including the second temperature, on condition that a range between the first temperature and the second temperature spans 1≤N≤M contiguous thermal regions of the pre-configured thermal regions; and

relocate blocks having a same tag to be adjacent in the memory array.

17. The system of claim 16 , the controller further configured to:

mark blocks for which the range between the first temperature and the second temperature spans more than M contiguous thermal regions as thermal outlier blocks.

18. The system of claim 17 , the controller further configured to:

marking the storage block as a thermal outlier block conditionally based on one or more of a number of cross-temperature events, a temperature range of one or more cross-temperature event, and a frequency of cross-temperature events while the block is open for programming.

19. The system of claim 16 , the controller further configured to:

detect an extreme cross-temperature event;

distinguish blocks closed after the extreme cross-temperature event and assigned a particular tag from blocks closed before the extreme cross-temperature event having the particular tag; and

relocate the blocks having the particular tag and closed after the extreme cross-temperature event to be adjacent in the memory array distinct from the blocks having the particular tag and closed before the extreme cross-temperature event.

20. The system of claim 19 , the controller further configured to:

distinguish the blocks closed before the extreme cross-temperature event from the blocks closed after the extreme cross-temperature event on condition that a bit error rate for a first of the blocks closed after the extreme cross-temperature event compares unfavorably to a bit error rate for one of the blocks closed before the extreme cross-temperature event.