Semipolar micro-LED
A light emitting diode includes an n-type semiconductor layer including a pit structure formed therein, active layers grown only on sidewalls of the pit structure and configured to emit light, and a p-type semiconductor layer on the active layers and at least partially in the pit structure. In one embodiment, the pit structure is characterized by a shape of an inverted pyramid. The pit structure is formed in the n-type semiconductor layer by, for example, etching the n-type semiconductor layer using an etch mask layer having apertures with slanted sidewalls, or growing the n-type semiconductor layer on a substrate through a mask layer having an array of apertures.
1. A light-emitting diode comprising:
an n-type semiconductor layer including a pit structure formed therein;
active layers grown only on sidewalls of the pit structure and configured to emit light; and
a p-type semiconductor layer on the active layers and at least partially in the pit structure.
2. The light-emitting diode of claim 1 , wherein the pit structure is characterized by a shape of an inverted pyramid.
3. The light-emitting diode of claim 2 , wherein:
a base of the inverted pyramid is characterized by a shape of a polygon; and
each edge of the polygon is at an intersection of a c-plane and an m-plane of the n-type semiconductor layer.
4. The light-emitting diode of claim 1 , wherein the pit structure is characterized by a maximum horizontal linear dimension less than 500 nm.
5. The light-emitting diode of claim 1 , wherein an angle between a sidewall of the pit structure and a c-plane of the n-type semiconductor layer is between 50° and 75°.
6. The light-emitting diode of claim 5 , wherein the angle between the sidewall of the pit structure and the c-plane of the n-type semiconductor layer is between 58° and 66°.
7. The light-emitting diode of claim 1 , wherein the active layers include GaN barrier layers and one or more InGaN quantum well layers.
8. The light-emitting diode of claim 1 , further comprising an electron blocking layer between the active layers and the p-type semiconductor layer.
9. A light source comprising:
an array of light-emitting diodes (LEDs), each LED of the array of LEDs comprising:
an n-type semiconductor layer including a pit structure formed therein;
active layers grown only on sidewalls of the pit structure and configured to emit light; and
a p-type semiconductor layer on the active layers and at least partially in the pit structure.
10. The light source of claim 9 , wherein:
a base of the pit structure is characterized by a shape of a polygon; and
each edge of the polygon is at an intersection of a c-plane and an m-plane of the n-type semiconductor layer.
11. The light source of claim 9 , wherein a base of the pit structure is characterized by a maximum horizontal linear dimension less than 500 nm.
12. The light source of claim 9 , wherein an angle between a sidewall of the pit structure and a c-plane of the n-type semiconductor layer is between 50° and 75°.
13. The light source of claim 9 , wherein each LED of the array of LEDs further comprises:
a p-contact coupled to the p-type semiconductor layer of the LED;
a conductive mirror coupled to the p-contact; and
a bonding pad electrically coupled to the conductive mirror and the p-contact.
14. The light source of claim 13 , wherein the p-contacts, the conductive mirrors, and the bonding pads of a group of LEDs in the array of LEDs are electrically connected to form a single pixel.
15. The light source of claim 13 , further comprising:
a backplane including drive circuits and metal bonding pads formed thereon,
wherein the bonding pads of a group of LEDs in the array of LEDs are electrically connected to a same metal bonding pad of the metal bonding pads on the backplane.
16. The light source of claim 9 , wherein:
a first group of LEDs in the array of LEDs is configured to emit visible light in a first wavelength range; and
a second group of LEDs in the array of LEDs is configured to emit visible light in a second wavelength range.
17. The light source of claim 16 , wherein a third group of LEDs in the array of LEDs is configured to emit visible light in a third wavelength range.
18. A method comprising:
forming a plurality of pit structures in a first doped semiconductor layer;
growing, using a first mask layer, active layers on only sidewalls of the pit structures, the active layers configured to emit light; and
growing a second doped semiconductor layer on the active layers, the second doped semiconductor layer at least partially in the plurality of pit structures.
19. The method of claim 18 , wherein forming the plurality of pit structures in the first doped semiconductor layer comprises:
forming an etch mask layer on the first doped semiconductor layer, wherein:
the etch mask layer includes an array of apertures;
sidewalls of each aperture of the array of apertures are slanted with respect to a c-plane of the first doped semiconductor layer; and
each aperture of the array of apertures is characterized by a circular or polygonal shape, wherein edges of the polygonal shape are at intersections of a c-plane and m-planes of the first doped semiconductor layer; and
etching the first doped semiconductor layer using the etch mask layer to form the pit structures in the first doped semiconductor layer.
20. The method of claim 18 , wherein forming the plurality of pit structures in the first doped semiconductor layer comprises:
forming a second mask layer on a substrate or a buffer layer, wherein:
the second mask layer includes an array of apertures; and
each aperture of the array of apertures is characterized by a circular or polygonal shape, wherein edges of the polygonal shape are at intersections between a c-plane and m-planes of the substrate or the buffer layer; and
growing the first doped semiconductor layer through the array of apertures, wherein sidewalls of semiconductor structures grown through the array of apertures form the plurality of pit structures.