Strain management of III-P micro-LED epitaxy towards higher efficiency and low bow
A micro-light emitting diode (micro-LED) wafer includes a substrate, an n-type semiconductor layer grown on the substrate, an active region grown on the n-type semiconductor layer and configured to emit visible light, and a p-type semiconductor layer grown on the active region. The active region includes a compressive-strained quantum well layer and compressive-strained quantum barrier layers. At least one of the p-type semiconductor layer or the n-type semiconductor layer includes a tensile-strained layer having a thickness greater than about 50 nm, such that the tensile-strained layers can counter the compressive strain of the active region, thereby reducing the overall strain and bow of the micro-LED wafer.
1. A micro-light emitting diode (micro-LED) wafer comprising:
a substrate;
an n-type semiconductor layer grown on the substrate;
an active region grown on the n-type semiconductor layer and configured to emit visible light, the active region including a compressive-strained quantum well layer and compressive-strained quantum barrier layers; and
a p-type semiconductor layer grown on the active region,
wherein at least one of the p-type semiconductor layer or the n-type semiconductor layer includes a tensile-strained layer having a lattice constant lower than a lattice constant of the substrate and a lattice constant of the active region.
2. The micro-LED wafer of claim 1 , wherein the tensile-strained layer is in the p-type semiconductor layer.
3. The micro-LED wafer of claim 2 , wherein the tensile-strained layer increases a potential barrier for electrons at the p-type semiconductor layer.
4. The micro-LED wafer of claim 2 , wherein the tensile-strained layer includes a p-doped (In x Al 1-x ) 0.5 P, (In x Ga 1-x ) 0.5 P, or (In x (GaAl) 1-x ) 0.5 P 0.5 layer in the p-type semiconductor layer.
5. The micro-LED wafer of claim 4 , wherein x is less than 0.5.
6. The micro-LED wafer of claim 1 , wherein:
the tensile-strained layer is in the p-type semiconductor layer; and
the n-type semiconductor layer includes a second tensile-strained layer.
7. The micro-LED wafer of claim 1 , wherein the tensile-strained layer is characterized by a thickness greater than 50 nm.
8. The micro-LED wafer of claim 1 , wherein a total bow of the micro-LED wafer is less than 10 μm.
9. The micro-LED wafer of claim 1 , wherein the tensile-strained layer is characterized by a diffraction peak greater than 50 arcseconds with respect to a diffraction peak of the substrate in an X-ray diffraction (XRD) diagram.
10. The micro-LED wafer of claim 1 , wherein:
the substrate includes a GaAs substrate or a GaAs substrate with a GaAs buffer layer; and
the active region includes one or more InGaAlP quantum barrier layers and at least one InGaP quantum well layer and is configured to emit red light.
11. A device comprising:
a substrate; and
an array of micro-light emitting diodes on the substrate, each micro-light emitting diode of the array of micro-light emitting diodes comprising a mesa structure that comprises:
an n-type semiconductor layer on the substrate;
an active region grown on the n-type semiconductor layer and configured to emit visible light, the active region including a compressive-strained quantum well layer and compressive-strained quantum barrier layers; and
a p-type semiconductor layer on the active region,
wherein at least one of the p-type semiconductor layer or the n-type semiconductor layer includes a tensile-strained layer having a lattice constant lower than a lattice constant of the substrate and a lattice constant of the active region.
12. The device of claim 11 , wherein the tensile-strained layer is in the p-type semiconductor layer and increases a potential barrier for electrons at the p-type semiconductor layer.
13. The device of claim 11 , wherein the tensile-strained layer is in the p-type semiconductor layer and the n-type semiconductor layer includes a second tensile-strained layer.
14. The device of claim 11 , wherein the tensile-strained layer is characterized by a thickness greater than 50 nm.
15. The device of claim 11 , wherein the tensile-strained layer is characterized by a diffraction peak greater than 50 arcseconds with respect to a diffraction peak of the substrate in an X-ray diffraction (XRD) diagram.
16. The device of claim 11 , wherein:
the substrate includes a GaAs substrate or a GaAs substrate with a GaAs buffer layer; and
the active region includes one or more InGaAlP quantum barrier layers and at least one InGaP quantum well layer and is configured to emit red light.
17. A method comprising:
epitaxially growing an n-type semiconductor layer on a substrate;
epitaxially growing an active region on the n-type semiconductor layer, the active region configured to emit red light and including a compressive-strained quantum well layer and compressive-strained quantum barrier layers; and
epitaxially growing a p-type semiconductor layer on the active region,
wherein at least one of the p-type semiconductor layer or the n-type semiconductor layer includes a tensile-strained layer having a lattice constant lower than a lattice constant of the substrate and a lattice constant of the active region.
18. The method of claim 17 , wherein the tensile-strained layer is in the p-type semiconductor layer and increases a potential barrier for electrons at the p-type semiconductor layer.
19. The method of claim 17 , wherein the tensile-strained layer is characterized by a diffraction peak greater than 50 arcseconds with respect to a diffraction peak of the substrate in an X-ray diffraction (XRD) diagram.
20. The method of claim 17 , wherein the tensile-strained layer is characterized by a thickness greater than 50 nm.