IP Library Granted Patent US 12,451,210
Granted Patent B2
US 12,451,210 · App. 18/411,397 · Granted Oct 21, 2025

Data storage device and method for read disturb mitigation during low-power modes

Inventors: Pawan Kumar Negi (Bengaluru, IN); Meer Afroz Mohammed (Bengaluru, IN); Bhavadip Bipinbhai Solanki (Bengaluru, IN)
Assignee: Sandisk Technologies, Inc.
G11C29/52G11C29/022G11C29/886
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Quick Facts
Patent No.
US 12,451,210
App. No.
18/411,397
Filed
Jan 12, 2024
Granted
Oct 21, 2025
Kind
B2
Art Unit
2824
USPC
365/185.09
Abstract

A data storage device can check data integrity on a wordline in memory each time the data storage device exits a low-power mode. Frequent exits from the low-power mode result in the wordline being read many times, which can result in a read disturb problem. To mitigate this problem, in one embodiment disclosed herein, a different wordline is used to check data integrity each time of a plurality of times that the data storage device exits a low-power mode. Using different wordlines for the data integrity check can reduce the likelihood of a read disturb error. Other embodiments are disclosed.

Claims (49)

1. A data storage device comprising:

a memory; and

one or more processors, individually or in combination, configured to:

receive a command from a host to exit a low-power mode; and

in response to receiving the command from the host to exit the low-power mode:

use firmware randomization logic to perform a randomization process to randomly select a single wordline from a set of wordlines in the memory designated for an active read scan;

perform a bit error rate (BER) check on the randomly-selected single wordline and its two directly adjacent neighbor wordlines;

determine whether there is a BER failure on the randomly-selected single wordline or its two directly adjacent neighbor wordlines; and

in response to determining that there is a BER failure on the randomly-selected single wordline or its two directly adjacent neighbor wordlines, perform a BER estimation scan (BES) of the memory.

2. The data storage device of claim 1 , wherein a different wordline is randomly selected from the set of wordlines each time of a plurality of times that the command to exit the low-power mode is received.

3. The data storage device of claim 1 , wherein the one or more processors, individually or in combination, are further configured to:

in response to determining that there is a BER failure on the randomly-selected single wordline or its two directly adjacent neighbor wordlines, relocate the block containing the randomly-selected single wordline or its two directly adjacent neighbor wordlines.

4. The data storage device of claim 1 , wherein the one or more processors, individually or in combination, are further configured to:

in response to determining that there is no BER failure on the randomly-selected single wordline or its two directly adjacent neighbor wordlines, perform an initialization process.

5. The data storage device of claim 1 , wherein the one or more processors, individually or in combination, are further configured to:

determine the set of wordlines in the memory designed for the active read scan.

6. The data storage device of claim 1 , wherein the memory comprises a three-dimensional memory.

7. In a data storage device comprising a memory, a method comprising:

each time of a plurality of times that the data storage device transitions from a low-power mode to an active mode:

using firmware randomization logic to perform a randomization process to randomly selecta single wordline in the memory, wherein a different single wordline is randomly selected in response to each time of the plurality of times;

determining whether a number of errors in the randomly-selected single wordline is above a threshold;

in response to determining that the number of errors in the randomly-selected single wordline is above the threshold, relocating data in the randomly-selected single wordline to another wordline in the memory;

determining whether a number of errors in two directly adjacent neighbor wordlines of the randomly-selected single wordline is above the threshold; and

in response to determining that the number of errors in the two directly adjacent neighbor wordlines of the randomly-selected single wordline is above the threshold, relocating data in the two directly adjacent neighbor wordlines to other wordlines in the memory.

8. The method of claim 7 , wherein data in a block containing the randomly-selected single wordline is relocated to a different block.

9. The method of claim 7 , wherein a bit error rate (BER) check is used to determine whether the number of errors in the randomly-selected single wordline is above the threshold.

10. The method of claim 7 , wherein the randomly-selected single wordline is randomly selected from a subset of wordlines that are considered relatively-more prone to error than other wordlines in the memory.

11. The method of claim 10 , further comprising:

determining which wordlines in the memory are contained in the subset of wordlines.

12. The method of claim 7 , further comprising:

using an exclusive-or handling process to recover data in the two directly adjacent neighbor wordlines.

13. The method of claim 7 , further comprising:

correcting error(s) in the randomly-selected single wordline.

14. The method of claim 7 , further comprising:

using an active read scan (ARS) to detect error(s) in the randomly-selected single wordline.

15. The method of claim 7 , further comprising:

in response to determining that the number of errors in the randomly-selected single wordline is above the threshold, performing a bit error rate (BER) estimation scan (BES) of the memory.

16. The method of claim 7 , further comprising:

in response to determining that the number of errors in the randomly-selected single wordline is not above the threshold, performing an initialization process.

17. The method of claim 7 , wherein the memory comprises a three-dimensional memory.

18. A data storage device comprising:

a memory; and

means for:

receiving a command from a host to exit a low-power mode; and

in response to receiving the command from the host to exit the low-power mode:

using firmware randomization logic to perform a randomization process to randomly select a single wordline from a set of wordlines in the memory designated for an active read scan;

performing a bit error rate (BER) check on the randomly-selected single wordline and its two directly adjacent neighbor wordlines;

determining whether there is a BER failure on the randomly-selected single wordline or its two directly adjacent neighbor wordlines; and

in response to determining that there is a BER failure on the randomly-selected single wordline or its two directly adjacent neighbor wordlines performing a BER estimation scan (BES) of the memory.