Data storage device and method for selectively performing a program-verify operation
When a memory is considered to be relatively reliable, a data storage device can program the memory without performing a subsequent verify-read step. However, some memory cells may be known during the manufacturing of the data storage device to be difficult to program, and such memory cells can be identified in a predetermined list as requiring a verify-read step. Other memory cells may become difficult to program over time, and those memory cells can be identified in a dynamic list as requiring a verify-read step.
1 . In a data storage device comprising a memory, a method comprising:
determining whether a logical wordline is identified in a static program verify data structure as requiring a read verification operation be performed after attempting to program the logical wordline;
in response determining that the logical wordline is not identified in the static program verify data structure, determining whether the logical wordline is identified in a dynamic program verify data structure as requiring the read verification operation be performed after attempting to program the logical wordline; and
in response determining that the logical wordline is not identified in the dynamic program verify data structure, programming the logical wordline without performing the read verification operation.
2 . The method of claim 1 , further comprising:
performing the read verification operation after programming the logical wordline in response to the logical wordline not being identified in either the static program verify data structure and the dynamic program verify data structure.
3 . The method of claim 1 , further comprising:
reading the logical wordline after the logical wordline has been programmed;
performing a read error handling operation on data read from the logical wordline; and
in response to the read error handling operation being unsuccessful, adding an identification of the logical wordline to the dynamic program verify data structure.
4 . The method of claim 3 , further comprising:
recovering the data;
attempting to program the recovered data in another logical wordline; and
in response to a failure to program the recovered data in the another logical wordline, removing the identification of the logical wordline from the dynamic program verify data structure.
5 . The method of claim 4 , wherein:
the logical wordline and the another logical wordline are in a block; and
the method further comprises identifying the block as a bad block.
6 . The method of claim 4 , further comprising:
performing an exclusive-or (XOR) operation to recover the data.
7 . The method of claim 4 , further comprising:
storing the recovered data in a buffer memory; and
attempting to program the recovered data from the buffer memory to the another logical wordline.
8 . The method of claim 1 , wherein the logical wordline is identified in the dynamic program verify data structure as a virtual block address.
9 . The method of claim 1 , wherein the logical wordline is part of a single-level cell (SLC) block.
10 . The method of claim 1 , wherein the memory comprises a three-dimensional memory.
11 . A data storage device comprising:
a memory; and
means for:
determining whether a string of memory cells is identified in a first data structure as requiring a read verification operation be performed after attempting to program the string of memory cells;
in response determining that the string of memory cells is not identified in the first data structure, determining whether the string of memory cells is identified in a second data structure as requiring the read verification operation be performed after attempting to program the string of memory cells; and
in response determining that the string of memory cells is not identified in the second data structure, programming the string of memory cells without performing the read verification operation.
12 . A data storage device comprising:
a memory; and
one or more processors, individually or in combination, configured to:
determine whether a logical wordline is identified in a static program verify data structure as requiring a read verification operation be performed after attempting to program the logical wordline;
in response determining that the logical wordline is not identified in the static program verify data structure, determine whether the logical wordline is identified in a dynamic program verify data structure as requiring the read verification operation be performed after attempting to program the logical wordline; and
in response determining that the logical wordline is not identified in the dynamic program verify data structure, program the logical wordline without performing the read verification operation.
13 . The data storage device of claim 12 , wherein the one or more processors, individually or in combination, are further configured to:
perform the read verification operation after programming the logical wordline in response to the logical wordline not being identified in either the static program verify data structure and the dynamic program verify data structure.
14 . The data storage device of claim 12 , wherein the one or more processors, individually or in combination, are further configured to:
read the logical wordline after the logical wordline has been programmed;
perform a read error handling operation on data read from the logical wordline; and
in response to the read error handling operation being unsuccessful, add an identification of the logical wordline to the dynamic program verify data structure.
15 . The data storage device of claim 14 , wherein the one or more processors, individually or in combination, are further configured to:
recover the data;
attempt to program the recovered data in another logical wordline; and
in response to a failure to program the recovered data in the another logical wordline, remove the identification of the logical wordline from the dynamic program verify data structure.
16 . The data storage device of claim 15 , wherein:
the logical wordline and the another logical wordline are in a block; and
the one or more processors, individually or in combination, are further configured to identify the block as a bad block.
17 . The data storage device of claim 15 , wherein the one or more processors, individually or in combination, are further configured to:
perform an exclusive-or (XOR) operation to recover the data.
18 . The data storage device of claim 15 , wherein the one or more processors, individually or in combination, are further configured to:
store the recovered data in a buffer memory; and
attempt to program the recovered data from the buffer memory to the another logical wordline.
19 . The data storage device of claim 12 , wherein the logical wordline is identified in the dynamic program verify data structure as a virtual block address.
20 . The data storage device of claim 12 , wherein the logical wordline is part of a single-level cell (SLC) block.