Electronic paper

1 . An electronic paper, comprising:

an array substrate and a cover plate that are arranged oppositely, and an electrophoretic layer disposed between the array substrate and the cover plate;

wherein the array substrate comprises: a substrate, a pixel electrode disposed on the substrate, a first auxiliary electrode disposed on the substrate and electrically connected to the pixel electrode, and a second auxiliary electrode disposed between the pixel electrode and the first auxiliary electrode, the second auxiliary electrode being insulated from the pixel electrode and the first auxiliary electrode;

wherein an orthographic projection of the second auxiliary electrode on the substrate is at least partly overlapped with an orthographic projection of the pixel electrode on the substrate, and is at least partly overlapped with an orthographic projection of the first auxiliary electrode on the substrate;

the array substrate further comprises a data line and an auxiliary electrode line, the array substrate comprises a plurality of pixel regions arranged in array, wherein each of the plurality of pixel regions is provided with two thin-film transistors connected in series, and each of the two thin film transistors comprises a source-drain electrode; and

the auxiliary electrode line is electrically connected to the second auxiliary electrode, an extension direction of the data line is parallel to an extension direction of the auxiliary electrode line, and a width of the data line is less than a width of the auxiliary electrode line; wherein

the array substrate further comprises: a first insulative layer disposed between the second auxiliary electrode and the first auxiliary electrode, and a second insulative layer disposed between the second auxiliary electrode and the pixel electrode;

the first insulative layer is provided with a first via hole, the second insulative layer is provided with a second via hole communicated with the first via hole, and the pixel electrode is electrically connected to the first auxiliary electrode by the first via hole and the second via hole; and

the second insulative layer is further provided with a third via hole, and the pixel electrode is electrically connected to the source-drain electrode by the third via hole; the first via hole, the second via hole, and the third via hole are located on a same side of the two thin-film transistors, and between the two thin-film transistors and the second auxiliary electrode.

2 . The electronic paper according to claim 1 , wherein each of the two thin-film transistors further comprises a gate electrode;

wherein the gate electrode and the first auxiliary electrode are arranged on a same layer, and are made of a same material; and the source-drain electrode and the second auxiliary electrode are arranged on a same layer, and are made of a same material.

3 . The electronic paper according to claim 2 , wherein each of the two thin-film transistors further comprises an active layer insulated from the gate electrode;

wherein the active layer is lapped with the source-drain electrode, the source-drain electrode is disposed on a side, distal from the substrate, of the active layer, and the gate electrode is disposed on a side, proximal to the substrate, of the active layer.

4 . The electronic paper according to claim 2 , wherein the array substrate further comprises: a gate line electrically connected to the gate electrode;

wherein an extension direction of the gate line is intersected with the extension direction of the data line, and is intersected with the extension direction of the auxiliary electrode line.

5 . The electronic paper according to claim 4 , wherein the extension direction of the data line is perpendicular to the extension direction of the gate line.

6 . The electronic paper according to claim 1 , wherein an orthographic projection of the first via hole on the substrate is within an orthographic projection of the second via hole on the substrate.

7 . The electronic paper according to claim 1 , wherein the orthographic projection of the second auxiliary electrode on the substrate is within the orthographic projection of the first auxiliary electrode on the substrate, and the orthographic projection of the first auxiliary electrode on the substrate is within the orthographic projection of the pixel electrode on the substrate.

8 . The electronic paper according to claim 7 , wherein an area of the orthographic projection of the first auxiliary electrode on the substrate is less than an area of the orthographic projection of the pixel electrode on the substrate.

9 . A display device, comprising an electronic paper; wherein the electronic paper comprises:

an array substrate and a cover plate that are arranged oppositely, and an electrophoretic layer disposed between the array substrate and the cover plate;

wherein the array substrate comprises: a substrate, a pixel electrode disposed on the substrate, a first auxiliary electrode disposed on the substrate and electrically connected to the pixel electrode, and a second auxiliary electrode disposed between the pixel electrode and the first auxiliary electrode, the second auxiliary electrode being insulated from the pixel electrode and the first auxiliary electrode;

wherein an orthographic projection of the second auxiliary electrode on the substrate is at least partly overlapped with an orthographic projection of the pixel electrode on the substrate, and is at least partly overlapped with an orthographic projection of the first auxiliary electrode on the substrate;

the array substrate further comprises a data line and an auxiliary electrode line, and the array substrate comprises a plurality of pixel regions arranged in array, wherein each of the plurality of pixel regions is provided with two thin-film transistors connected in series, and each of the two thin-film transistors comprises a source-drain electrode; and

the auxiliary electrode line is electrically connected to the second auxiliary electrode, an extension direction of the data line is parallel to an extension direction of the auxiliary electrode line, and a width of the data line is less than a width of the auxiliary electrode line wherein

the array substrate further comprises: a first insulative layer disposed between the second auxiliary electrode and the first auxiliary electrode, and a second insulative layer disposed between the second auxiliary electrode and the pixel electrode;

the first insulative layer is provided with a first via hole, the second insulative layer is provided with a second via hole communicated with the first via hole, and the pixel electrode is electrically connected to the first auxiliary electrode by the first via hole and the second via hole; and

the second insulative layer is further provided with a third via hole, and the pixel electrode is electrically connected to the source-drain electrode by the third via hole; the first via hole, the second via hole, and the third via hole are located on a same side of the two thin-film transistors, and between the two thin-film transistors and the second auxiliary electrode.

10 . The display device according to claim 9 , wherein each of the two thin-film transistors further comprises a gate electrode;

wherein the gate electrode and the first auxiliary electrode are arranged on a same layer, and are made of a same material; and the source-drain electrode and the second auxiliary electrode are arranged on a same layer, and are made of a same material.

11 . The display device according to claim 10 , wherein each of the two thin-film transistors further comprises an active layer insulated from the gate electrode;

wherein the active layer is lapped with the source-drain electrode, the source-drain electrode is disposed on a side, distal from the substrate, of the active layer, and the gate electrode is disposed on a side, proximal to the substrate, of the active layer.

12 . The display device according to claim 10 , wherein the array substrate further comprises: a gate line electrically connected to the gate electrode;

wherein an extension direction of the gate line is intersected with the extension direction of the data line, and is intersected with the extension direction of the auxiliary electrode line.

13 . The display device according to claim 12 , wherein the extension direction of the data line is perpendicular to the extension direction of the gate line.