Closed-loop sampling methods and systems
Embodiments of a sampling system and a method for sampling are disclosed. In an embodiment, a sampling system includes a sampler array that includes sampling cells, a timing controller connected to the sampler array to form a closed loop and configured to correct a timing mismatch in the sampler array, and a time to digital converter (TDC) configured to perform indexing of the sampling cells in the sampler array.
1 . A sampling system, the sampling system comprising:
a sampler array that comprises a plurality of sampling cells;
a timing controller connected to the sampler array to form a closed loop and configured to correct a timing mismatch in the sampler array; and
a time to digital converter (TDC) configured to perform indexing of the sampling cells in the sampler array;
wherein the sampling cells are configured to capture and store a plurality of analog values at a plurality of discrete time intervals, and wherein each of the sampling cells is configured to operate in one of a sampling mode and a readout mode.
2 . The sampling system of claim 1 , wherein the TDC is further configured to locate a first sampling cell and a last sampling cell of the sampling cells in the sampler array in response to a trigger signal.
3 . The sampling system of claim 2 , wherein the TDC is further configured to locate the first sampling cell in the sampler array that corresponds to an arrival of the trigger signal.
4 . The sampling system of claim 1 , wherein the timing controller is further configured to synchronize the closed loop based on an external reference clock for sampling clock alignment.
5 . The sampling system of claim 1 , further comprising an analog-to-digital converter (ADC) configured to convert an analog output of the sampler array into a digital output signal.
6 . The sampling system of claim 5 , further comprising a digital signal processing (DSP) unit configured to process the digital output signal based on an input from the TDC.
7 . The sampling system of claim 6 , wherein the TDC is further configured to perform indexing of the sampling cells in the sampler array to generate a TDC code, and wherein the DSP unit is further configured to rearrange data in the digital output signal depending on the TDC code.
8 . The sampling system of claim 1 , wherein each of the sampling cells comprises a sampling switch, a capacitor, a buffer, a readout switch, and a delay cell, wherein the sampling switch and the capacitor are configured to capture and store analog data, and wherein the readout switch and the buffer are configured to read the stored analog data.
9 . The sampling system of claim 1 , wherein data that is read out from the sampler array is sequentially arranged in a digital domain.
10 . A sampling system, the sampling system comprising:
a sampler array that comprises a plurality of sampling cells;
a timing controller connected to the sampler array to form a closed loop and configured to synchronize the closed loop based on an external reference clock for sampling clock alignment; and
a time to digital converter (TDC) configured to perform indexing of the sampling cells in the sampler array to generate a TDC code;
wherein the sampling cells are configured to capture and store a plurality of analog values at a plurality of discrete time intervals, and wherein each of the sampling cells is configured to operate in one of a sampling mode and a readout mode.
11 . The sampling system of claim 10 , wherein the TDC is further configured to locate a first sampling cell and a last sampling cell of the sampling cells in the sampler array in response to a trigger signal, and wherein the TDC is further configured to locate the first sampling cell in the sampler array that corresponds to an arrival of the trigger signal.
12 . The sampling system of claim 10 , further comprising an analog-to-digital converter (ADC) configured to convert an analog output of the sampler array into a digital output signal.
13 . The sampling system of claim 12 , further comprising a digital signal processing (DSP) unit configured to process the digital output signal based on the TDC code.
14 . The sampling system of claim 10 , wherein each of the sampling cells comprises a sampling switch, a capacitor, a buffer, a readout switch, and a delay cell, wherein the sampling switch and the capacitor are configured to capture and store analog data, and wherein the readout switch and the buffer are configured to read the stored analog data.
15 . The sampling system of claim 10 , wherein data that is read out from the sampler array is sequentially arranged in a digital domain.
16 . A sampling system, the sampling system comprising:
a sampler array that comprises a plurality of sampling cells;
a timing controller connected to the sampler array to form a closed loop and configured to correct a timing mismatch in the sampler array; and
a time to digital converter (TDC) configured to perform indexing of the sampling cells in the sampler array;
further comprising;
an analog-to-digital converter (ADC) configured to convert an analog output of the sampler array into a digital output signal; and
a digital signal processing (DSP) unit configured to process the digital output signal based on an input from the TDC;
wherein the TDC is further configured to perform indexing of the sampling cells in the sampler array to generate a TDC code, and wherein the DSP unit is further configured to rearrange data in the digital output signal depending on the TDC code.
17 . A sampling system, the sampling system comprising:
a sampler array that comprises a plurality of sampling cells;
a timing controller connected to the sampler array to form a closed loop and configured to correct a timing mismatch in the sampler array; and
a time to digital converter (TDC) configured to perform indexing of the sampling cells in the sampler array;
wherein each of the sampling cells comprises a sampling switch, a capacitor, a buffer, a readout switch, and a delay cell, wherein the sampling switch and the capacitor are configured to capture and store analog data, and wherein the readout switch and the buffer are configured to read the stored analog data.
18 . A sampling system, the sampling system comprising:
a sampler array that comprises a plurality of sampling cells;
a timing controller connected to the sampler array to form a closed loop and configured to synchronize the closed loop based on an external reference clock for sampling clock alignment; and
a time to digital converter (TDC) configured to perform indexing of the sampling cells in the sampler array to generate a TDC code;
wherein each of the sampling cells comprises a sampling switch, a capacitor, a buffer, a readout switch, and a delay cell, wherein the sampling switch and the capacitor are configured to capture and store analog data, and wherein the readout switch and the buffer are configured to read the stored analog data.