IP Library Granted Patent US 12663927
Granted Patent B2
US 12663927 · App. 19/020,614 · Granted Jun 23, 2026

Channel optimized storage modules

Inventor: Kimmo Juhani Mylly (Ylojarvi, FI)
Assignee: Memory Technologies LLC
G06F3/0619G06F3/061G06F3/0644G06F3/0659G06F3/0679G06F3/0688
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Quick Facts
Patent No.
US 12663927
App. No.
19/020,614
Granted
Jun 23, 2026
Kind
B2
Abstract

A storage module includes a set of memories. Each of the memories in the set of memories may be divided into a set of portions. A controller is configured to transfer data between the set of memories and a host connected through an interface. A set of channels connects the set of memories to the controller. The controller is also configured to select: a memory from the set of memories, a portion from the set of portions for the selected memory, and/or a channel from the set of channels, e.g., connected to the selected memory, based upon an identification (ID) associated with the data. The ID may be separate from the data and a write address of the data, and the selected memory, the selected portion, and the selected channel may be used to store the data.

Claims (48)

1 . A storage device comprising:

at least one memory having a plurality of memory areas including a first memory area and a second memory area, the plurality of memory areas corresponding to a plurality of identifiers, wherein the first memory area is associated with a first identifier and the second memory area is associated with a second identifier, the plurality of identifiers including the first identifier and the second identifier;

at least one register indicating a number of the plurality of identifiers; and

a controller configured to:

receive, from a host device, a first command to store first data in the at least one memory;

determine that the first command is received lacking any identifier of the plurality of identifiers;

store, based at least in part on the first command being received lacking any identifier, the first data in a portion of the first memory area, wherein the portion of the first memory area is used as a default to store the first data;

receive, from the host device and with the second identifier, a second command to store second data in the at least one memory; and

store, based at least in part on the second identifier, the second data in the second memory area of the at least one memory.

2 . The storage device of claim 1 , wherein the first command comprises a write command including a logical memory address associated with the first data.

3 . The storage device of claim 1 , wherein the controller is further configured to:

receive, from the host device, a read command to read the first data;

determine that the first data is stored in the portion of the first memory area; and

read the first data from the portion of the first memory area.

4 . The storage device of claim 1 , wherein the controller is further configured to:

select the first memory area by identifying that the first data is received without any corresponding particular identifier of the plurality of identifiers.

5 . The storage device of claim 1 , wherein individual ones of the plurality of identifiers correspond to one of: (i) one or more NAND memory blocks; (ii) one or more planes of the at least one memory; (iii) one or more banks of the at least one memory; (iv) one or more discrete chips of the at least one memory; or (v) one or more pages of the at least one memory.

6 . The storage device of claim 1 , wherein individual ones of the plurality of identifiers correspond to one or more logical units of the at least one memory.

7 . The storage device of claim 1 , wherein the controller is further configured to use the second identifier to identify a hardware resource associated with the second memory area.

8 . The storage device of claim 1 , wherein the second identifier is associated with a type of data corresponding to the second data.

9 . The storage device of claim 1 , wherein the second identifier is obtained from a register.

10 . A method comprising:

receiving, from a host device and by a storage device, a first command to store first data in the storage device, the storage device including a plurality of memory areas including a first memory area and a second memory area, the plurality of memory areas corresponding to a plurality of identifiers, wherein the first memory area is associated with a first identifier and the second memory area is associated with a second identifier, the plurality of identifiers including the first identifier and the second identifier;

determining, by the storage device, that the first command is received lacking any identifier of the plurality of identifiers;

storing, by the storage device and based at least in part on the first command being received lacking any identifier, the first data in a portion of the first memory area, wherein the portion of the first memory area is used as a default to store the first data;

receiving, from the host device and with the second identifier, a second command to store second data in the storage device; and

storing, based at least in part on the second identifier, the second data in the second memory area of the storage device.

11 . The method of claim 10 , wherein the first command comprises a write command including a logical memory address associated with the first data.

12 . The method of claim 10 , further comprising:

receiving, from the host device, a read command to read the first data;

determining, by the storage device, that the first data is stored in the portion of the first memory area; and

reading the first data from the portion of the first memory area.

13 . The method of claim 10 , wherein individual ones of the plurality of identifiers correspond to one or more logical units of the storage device.

14 . The method of claim 10 , further comprising:

using, by the storage device, the second identifier to identify a hardware resource associated with the second memory area.

15 . The method of claim 10 , wherein the second identifier is associated with a type of data corresponding to the second data.

16 . The method of claim 10 , wherein the storage device includes at least one memory and individual ones of the plurality of identifiers correspond to one of: (i) one or more NAND memory blocks; (ii) one or more planes of the at least one memory; (iii) one or more banks of the at least one memory; (iv) one or more discrete chips of the at least one memory; or (v) one or more pages of the at least one memory.

17 . The method of claim 10 , further comprising:

selecting the first memory area by identifying that the first data is received without any corresponding particular identifier of the plurality of identifiers.

18 . A host device, comprising:

an interface configured to couple the host device to a storage device including at least one memory having a plurality of memory areas including a first memory area and a second memory area, the plurality of memory areas corresponding to a plurality of identifiers, wherein the first memory area is associated with a first identifier and the second memory area is associated with a second identifier, the plurality of identifiers including the first identifier and the second identifier, a portion of the first memory area being a default memory area; and

a host controller configured to:

determine that a first data is to be stored in the at least one memory of the storage device;

transmit, to the storage device via the interface and unassociated with any identifier, the first data to be stored in the at least one memory;

determine that a second data is to be stored in the second memory area; and

transmit, to the storage device and via the interface, the second data in association with the second identifier.

19 . The host device of claim 18 , wherein the host controller is further configured to determine a type of data corresponding to the second data.

20 . The host device of claim 18 , wherein the host controller is further configured to identify a number of the plurality of identifiers from at least one register of the storage device.