IP Library Granted Patent US 12664012
Granted Patent B2
US 12664012 · App. 17/957,311 · Granted Jun 23, 2026

Workload linked performance scaling for servers

Inventors: Subhankar Panda (Portland, OR); Rupal M. Parikh (Austin, TX); Gaurav Porwal (Portland, OR); Raghavendra Nagaraj (Bangalore, IN); Sagar C. Pawar (Bangalore, IN); Prakash Pillai (Bangalore, IN)
Assignee: Intel Corporation
G06F9/45558G06F9/3555G06F9/505G06F2009/4557G06F2009/45595
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Quick Facts
Patent No.
US 12664012
App. No.
17/957,311
Granted
Jun 23, 2026
Kind
B2
Abstract

Embodiments herein relate to providing uniform servicing of workloads at a set of servers in a computer network. A platform determines and meets the performance requirements of a workload by scaling a performance capability of a group of processing units such as central processing units (CPUs) which are assigned to service the workload. This can involve increasing the power (P) state of one or more of the processing units to a highest P state in the group, so that every processing units in the group provides the same performance for a given workload. The platform can manage scaling of the processing units performance by reading a performance profile list which indicates minimum and maximum scaling points for programs that are executed to service the workload.

Claims (38)

1 . An apparatus, comprising:

a plurality of processing units arranged in one or more servers; and

a managing circuit in communication with the plurality of processing units, wherein each processing unit operates in a respective performance state and informs the managing circuit of the respective performance state, the managing circuit assigns tasks of a workload to a group of processing units among the plurality of processing units, determines whether the processing units in the group are in different performance states and, if the processing units in the group are in different performance states, increase a performance state of one of more of the processing units of the group to match a highest performance state of the group of processing units, to service the tasks in each processing unit of the group at the highest performance state of the group;

wherein the managing circuit comprises a register, the register stores a value for each processing unit, and for each processing unit, the value indicates that neither a base clock nor a core ratio can be altered, the core ratio but not the base clock can be altered, the base clock but not the core ratio can be altered or both the base clock and the core ratio can be altered.

2 . The apparatus of claim 1 , wherein the respective performance state of each processing unit is selected from a plurality of available performance states, each performance state having a different voltage, frequency pair.

3 . The apparatus of claim 1 , wherein the respective performance state of each processing unit is selected from a plurality of available performance states, each performance state having a different clock frequency.

4 . The apparatus of claim 1 , wherein the register indicates a performance scaling capability of each processing unit.

5 . The apparatus of claim 1 , wherein the managing circuit assigns the tasks to the group of processing units based on a performance profile of the workload, the performance profile comprises a name of the workload, a performance profile array, a minimum scaling array and a maximum scaling array.

6 . The apparatus of claim 5 , wherein:

the performance profile array indicates a set of programs to be executed on the group of processing units;

the minimum scaling array indicates a minimum scaling point for each program; and

the maximum scaling array indicates a maximum scaling point for each program.

7 . The apparatus of claim 6 , wherein for at least one of the programs, the minimum scaling point is equal to the maximum scaling point such that the program will operate at a fixed scaling point.

8 . The apparatus of claim 1 , wherein to assign the tasks of the workload to the group of processing units, the managing circuit is to determine a required number of processing units to service the workload, query each processing unit of the plurality of processing units to determining their respective performance state, and assign the tasks to processing units having a common performance state if a number of the processing units having the common performance state is at least equal to the required number of processing units needed to service the workload.

9 . The apparatus of claim 1 , wherein to assign the tasks of the workload to the group of processing units, the managing circuit is to determine a required number of processing units to service the workload, query each processing unit of the plurality of processing units to determining their respective performance state, and assign the tasks to the processing units having the different performance states if a number of the processing units having a common performance state is less than the required number of processing units needed to service the workload.

10 . The apparatus of claim 1 , wherein to inform the managing circuit of the respective performance state, each processing unit is to inform the managing circuit of a current scaling point.

11 . An apparatus, comprising:

a memory to store instructions; and

a processor to execute the instructions to:

communicate a workload to a managing circuit for one or more servers, wherein the workload comprises a performance profile, and the performance profile comprises a name of the workload, a performance profile array, a minimum scaling array and a maximum scaling array, and the managing circuit is to assign the workload to a group of processing units of the one or more servers according to the performance profile; and

receive a response from the one or more servers pursuant to the assignment;

wherein in preparation for communicating the workload to the managing circuit, the processor is to execute the instructions to access a register associated with the managing circuit, the register stores a value for each processing unit of the one or more servers, and for each processing unit, the value indicates that neither a base clock nor a core ratio can be altered, the core ratio but not the base clock can be altered, the base clock but not the core ratio can be altered or both the base clock and the core ratio can be altered.

12 . The apparatus of claim 11 , wherein:

the performance profile array indicates a set of programs to be executed;

the minimum scaling array indicates a minimum scaling point for each program; and

the maximum scaling array indicates a maximum scaling point for each program.

13 . The apparatus of claim 12 , wherein for at least one of the programs, the minimum scaling point is equal to the maximum scaling point such that the program is to operate at a fixed scaling point.

14 . The apparatus of claim 11 , wherein the memory and the processor are at a client device of the one or more servers, and the register indicates a performance scaling capability of each processing unit of the one or more servers.

15 . An apparatus, comprising:

a memory to store instructions; and

a processor to execute the instructions to:

receive a workload;

in response to the receiving of the workload, query each processing unit of a plurality of processing units to determining respective performance states, wherein the processing units are arranged in one or more servers;

based on the respective performance states, assign tasks of the workload to a group of processing units among the plurality of processing units; and

if the processing units in the group are in different performance states, adjust a performance state of one of more of the processing units of the group to provide a common performance state across the group of processing units, to service the workload in each processing unit of the group at the common performance state, wherein the adjusting of the performance state of the one of more of the processing units comprises accessing a register to determine a performance scaling capability of the one of more of the processing units, wherein the register indicates whether at least one of a base clock or a core ratio of the one of more of the processing units can be altered.

16 . The apparatus of claim 15 , wherein to adjust the performance state of one of more of the processing units of the group, the processor is to execute the instructions to increase a performance state of one of more of the processing units of the group to match a highest performance state of the group of processing units, to service the workload in each processing unit of the group at the highest performance state of the group.

17 . The apparatus of claim 15 , wherein to adjust the performance state of one of more of the processing units of the group, the processor is to execute the instructions to instruct the one of more of the processing units to increase their performance state to a highest performance state of the group of processing units.

18 . The apparatus of claim 15 , wherein the processor is to execute the instructions to assign the tasks to the group of processing units based on a performance profile of the workload.