IP Library Granted Patent US 12664290
Granted Patent B2
US 12664290 · App. 18/299,216 · Granted Jun 23, 2026

Memory protection

Inventors: Roberto Avanzi (Munich, DE); Andreas Lars Sandberg (Cambridge, GB); Ionut Alexandru Mihalcea (London, GB); David Helmut Schall (Bad Reppenau, DE); Alexander Klimov (Hadera, IL)
Assignee: Arm Limited
G06F21/602G06F21/78
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12664290
App. No.
18/299,216
Granted
Jun 23, 2026
Kind
B2
Abstract

Apparatuses and methods for memory protection are disclosed. A memory protection apparatus is interposed between a system cache and a memory system. The apparatus comprises encryption circuitry, which encrypts data item in dependence on encryption metadata and decrypts encrypted data items in dependence on the encryption metadata. In response to a change in a metadata item of the encryption metadata, when no cached copy of an affected data item is currently in the system cache, the affected data item is retrieved from the memory system, re-encrypted using the updated metadata item and returned to the memory system. When there is a cached copy, in dependence on update control data, the copy is retrieved from the system cache, encrypted using the updated metadata item and written out to the memory system.

Claims (48)

1 . An apparatus for memory protection comprising:

a system cache interface configured to couple the apparatus to a system cache;

a memory system interface configured to couple the apparatus to a memory system;

encryption circuitry configured to encrypt a data item received via the system cache interface in dependence on encryption metadata to produce an encrypted data item for passing via the memory system interface to the memory system and configured to decrypt an encrypted data item received via the memory system interface in dependence on the encryption metadata to produce a decrypted data item for provision via the system cache interface; and

update control circuitry responsive to a change in a metadata item of the encryption metadata to:

determine at least one affected data item which has been encrypted using the metadata item and which is affected by the change in the metadata item;

determine whether there is a cached copy of the at least one affected data item currently in the system cache; and

when there is not the cached copy of the at least one affected data item currently in the system cache,

to cause an encrypted version of the at least one affected data item to be retrieved from the memory system,

to trigger the encryption circuitry to perform an encryption-metadata-change-triggered decryption of the encrypted version of the at least one affected data item using the metadata item in pre-change form to produce a decrypted version of the at least one affected data item,

to trigger the encryption circuitry to perform an encryption of the decrypted version of the at least one affected data item using the metadata item in post-change form,

and to cause the at least one affected data item encrypted using the metadata item in post-change form to be returned to the memory system, and when there is the cached copy of the at least one affected data item currently in the system cache,

to cause said encryption-metadata-change-triggered decryption to be omitted, to cause the at least one affected data item to be retrieved from the system cache, to be encrypted using the metadata item in post-change form, and to be written out to the memory system.

2 . The apparatus as claimed in claim 1 , wherein the encryption circuitry comprises counter circuitry configured to maintain at least one count value, wherein the encryption metadata comprises the at least one count value, and wherein the encryption circuitry is configured to encrypt the data item received via the system cache interface in dependence on the at least one count value and to decrypt the received encrypted data item received via the memory system interface in dependence on the at least one count value,

and wherein the change in the metadata item of the encryption metadata comprises an incrementing of the at least one count value by the counter circuitry.

3 . The apparatus as claimed in claim 1 , further comprising data integrity checking circuitry configured to generate an integrity value for the data item received via the system cache interface and to cause the integrity value to be stored in association with the encrypted data item in the memory system,

and configured to regenerate the integrity value in dependence on the received encrypted data item and to compare the regenerated integrity value with the integrity value stored in association with the encrypted data item to verify the integrity of the received encrypted data item.

4 . A data processing system comprising:

a plurality of data processing devices, wherein at least one of the plurality of data processing devices is provided with a private cache;

the apparatus for memory protection as claimed in claim 1 ;

the system cache;

and the memory system,

wherein the update control circuitry is responsive to the change in the metadata item of the encryption metadata to determine whether there is a locally cached copy of the at least one affected data item currently in the private cache of at least one of the plurality of data processing devices,

and when there is the locally cached copy of the at least one affected data item, to cause the locally cached copy to be brought into the system cache.

5 . A method of memory protection comprising:

receiving a data item from a system cache via a system cache interface;

encrypting the data item in dependence on encryption metadata to produce an encrypted data item;

passing the encrypted data item via a memory system interface to a memory system;

receiving the encrypted data item via the memory system interface;

decrypting the encrypted data item in dependence on the encryption metadata to produce a decrypted data item for provision via the system cache interface;

responding to a change in a metadata item of the encryption metadata by:

determining at least one affected data item which has been encrypted using the metadata item and which is affected by the change in the metadata item;

determining whether there is a cached copy of the at least one affected data item currently in the system cache;

and when there is not the cached copy of the at least one affected data item currently in the system cache,

causing an encrypted version of the at least one affected data item to be retrieved from the memory system,

triggering an encryption-metadata-change-triggered decryption of the encrypted version of the at least one affected data item using the metadata item in pre-change form to produce a decrypted version of the at least one affected data item,

triggering the encryption circuitry to perform an encryption of the decrypted version of the at least one affected data item using the metadata item in post-change form,

and causing the at least one affected data item encrypted using the metadata item in post-change form to be returned to the memory system,

and when there is the cached copy of the at least one affected data item currently in the system cache, causing said encryption-metadata-change-triggered decryption to be omitted, and causing the at least one affected data item to be retrieved from the system cache, to be encrypted using the metadata item in post-change form, and to be written out to the memory system.

6 . The apparatus as claimed in claim 1 , wherein the update control circuitry is responsive to the change in the metadata item of the encryption metadata to: when there is the cached copy of the at least one affected data item currently in the system cache, in dependence on update control data, to cause the at least one affected data item to be retrieved from the system cache, to be encrypted using the metadata item in post-change form, and to be written out to the memory system.

7 . The apparatus as claimed in claim 6 , wherein the update control circuitry is responsive to the change in the metadata item of the encryption metadata, when there is the cached copy of the at least one affected data item currently in the system cache,

when the update control data has a first value, to cause the cached copy of the at least one affected data item to be retrieved from the system cache, to be encrypted using the metadata item in post-change form, and to be written out to the memory system,

and when the update control data has a second value, to cause the cached copy of the at least one affected data item to be marked as modified in the system cache.

8 . The apparatus as claimed in claim 7 , wherein the update control circuitry is configured to maintain the update control data in a dynamic manner, wherein the update control data takes the first value or the second value in dependence on at least one dynamic factor when the apparatus is in operation.

9 . The apparatus as claimed in claim 8 , wherein the at least one dynamic factor comprises an indication of a master device accessing the at least one affected data item.

10 . The apparatus as claimed in claim 8 , wherein the at least one dynamic factor comprises a category of data to which the at least one affected data item has been assigned.

11 . The apparatus as claimed in claim 8 , wherein the at least one dynamic factor comprises a data access pattern indicator, wherein the data access pattern indicator has been empirically determined from previous data access patterns.

12 . The apparatus as claimed in claim 7 , wherein the update control data is set to cause the at least one affected data item to be retrieved from the system cache, to be encrypted using the metadata item in post-change form, and to be written out to the memory system.