Concurrently routing multiple partitions of an integrated circuit design
Some embodiments of the invention provide an integrated circuit (IC) that has a novel non-preferred direction (NPD) wiring architecture. In some embodiments, the IC includes a substrate and multiple wiring layers, which include a first set of one or more wiring layers with no preferred wiring directions, and a second set of one or more wiring layers with preferred wiring directions. In some embodiments, the first set of wiring layers includes the third and fourth wiring layers, while the second set of wiring layers includes the fifth and higher metal layers with successive neighboring layers having different (e.g., alternating) preferred wiring directions. The first set of wiring layers in other embodiments includes the third wiring layer but not the fourth wiring layer, which in these embodiments has a preferred wiring direction.
1 . A method of performing routing for an integrated circuit (IC) design, the method comprising:
identifying a plurality of partitions of the IC design;
assigning each of two or more partitions to two or more different instances of a routing process, wherein at least two different routing process instances execute on two different processing cores of a computer with multiple processing cores; and
directing each routing process instance to start to identify one or more different routing solutions for routing nets that have nodes in the routing process instance's associated partition, said routing process instances for neighboring partitions sharing routing solutions identified for their respective partitions,
wherein the routing process instances share a common first memory and use the common first memory to share routing solutions identified for their respective partitions, wherein said routing process instances use the routing solutions shared through the common first memory to identify a common location for crossing a boundary between two neighboring partitions by two routes that are identified for the two neighboring partitions by two different routing process instances for the same net.
2 . The method of claim 1 , wherein a size of each partition is related to an amount of at least one resource of the computer, said resource comprising at least one of an amount of a memory resource of the computer and an amount of a processing resource of the computer.
3 . The method of claim 1 , wherein each routing process instance uses a second memory that is not shared with other routing process instances to perform routing operations that iteratively identify different routing solutions.
4 . The method of claim 1 , wherein the plurality of partitions is a first plurality of partitions, wherein each routing process instance identifies topological routes that are defined by reference to edges of a second plurality of partitions that are defined by tessellating the routing process instance's corresponding partition in the first plurality of partitions.
5 . The method of claim 4 further comprising performing a geometric routing operation after each routing process instance finishes selecting one identified routing solution for geometric routing.
6 . The method of claim 5 ,
wherein each particular topological route is defined by reference to where the particular topological route crosses one or more edges of a first plurality of tessellating polygons compared to where other topological routes cross the same edges,
wherein each geometric route is defined by reference to three or more coordinates of three or more locations in the IC design.
7 . The method of claim 6 , wherein the locations used to define the geometric routes comprise locations along edges of a second plurality of tessellating polygons.
8 . The method of claim 7 , wherein the first and second pluralities of tessellating polygons are identical.
9 . The method of claim 7 , wherein the first and second pluralities of tessellating polygons are different.
10 . A non-transitory machine readable medium storing a routing program for identifying routes in an integrated circuit (IC) design, the program for execution by at least one processing unit, the program comprising sets of instructions for:
identifying a plurality of partitions of the IC design;
assigning each of two or more partitions to two or more different instances of a routing process, wherein at least two different routing process instances execute on two different processing cores of a computer with multiple processing cores; and
directing each routing process instance to start to identify one or more different routing solutions for routing nets that have nodes in the routing process instance's associated partition, said routing process instances for neighboring partitions sharing routing solutions identified for their respective partitions,
wherein the routing process instances share a common first memory and use the common first memory to share routing solutions identified for their respective partitions, wherein said routing process instances use the routing solutions shared through the common first memory to identify a common location for crossing a boundary between two neighboring partitions by two routes that are identified for the two neighboring partitions by two different routing process instances for the same net.
11 . The non-transitory machine readable medium of claim 10 , wherein a size of each partition is related to an amount of at least one resource of the computer, said resource comprising at least one of an amount of a memory resource of the computer and an amount of a processing resource of the computer.
12 . The non-transitory machine readable medium of claim 10 , wherein the program further comprises a set of instructions for using an amount of one or more resources of the computer to select a size of each partition, said set of one or more resources comprising at least one of an amount of a memory resource of the computer and an amount of a processing resource of the computer.
13 . The non-transitory machine readable medium of claim 10 , wherein each routing process instance uses a second memory that is not shared with other routing process instances to perform routing operations that iteratively identify different routing solutions.