Display virtualization
Described herein is a partitional graphics processor including a display controller including hardware display virtualization. One embodiment provides a graphics processor comprising a system interface including a first virtual interface and a second virtual interface, a render engine to perform graphics rendering operations, and a display engine including hardware display virtualization. The render engine is configured to perform a first rendering operation in response to a command received via the first virtual interface and a second rendering operation in response to a command received via the second virtual interface. The display engine configured to present output of the first rendering operation via a first physical display plane that is associated with the first virtual interface and present output of the second rendering operation via a second physical display plane that is associated with the second virtual interface.
1 . A graphics processing unit comprising:
system interface circuitry including a first virtual interface and a second virtual interface;
a render engine to perform graphics rendering operations, the render engine configured to perform a first rendering operation in response to a command received via the first virtual interface and a second rendering operation in response to a command received via the second virtual interface; and
a display engine including hardware display virtualization circuitry configured to map virtualized resources of the display engine to the first virtual interface and the second virtual interface, the display engine configured to:
present output of the first rendering operation via a first physical display plane that is associated with a first virtual display plane mapped to the first virtual interface, the first physical display plane including circuitry configured to read output of the first rendering operation from a first location in memory of the graphics processing unit; and
present output of the second rendering operation via a second physical display plane that is associated with a second virtual display plane mapped the second virtual interface, the second physical display plane including circuitry configured to read output of the second rendering operation from a second location in memory of the graphics processing unit.
2 . The graphics processing unit as in claim 1 , wherein the display engine is configured to blend contents of the first physical display plane with the second physical display plane and output blended contents to a display device, the blended contents including a composition of output of the first rendering operation and the second rendering operation.
3 . The graphics processing unit as in claim 2 , wherein the first physical display plane and the second physical display plane are configured to have a common configuration.
4 . The graphics processing unit as in claim 1 , wherein the display engine is configured to output contents of the first physical display plane to a first display device via a first physical display connector of the graphics processing unit and output the contents of the second physical display plane to a second display device via a second physical display connector of the graphics processing unit, the first physical display connector mapped to a first virtual display pipeline and the second physical display connector mapped to a second virtual display pipeline.
5 . The graphics processing unit as in claim 4 , wherein the display engine is to enable a first display configuration to be set via the first virtual interface and a second display configuration to be set via the second virtual interface.
6 . The graphics processing unit as in claim 5 , wherein the first display configuration is applied to first display output circuitry associated with first physical display plane and the second display configuration is applied to second display output circuitry associated with the second physical display plane.
7 . The graphics processing unit as in claim 1 , wherein the first virtual interface and the second virtual interface each include a single root input/output virtualization (SR-IOV) virtual function.
8 . The graphics processing unit as in claim 1 , wherein the first virtual interface and the second virtual interface each include a scalable input/output virtualization (S-IOV) assignable device interface.
9 . A method comprising:
on a graphics processing unit having a display engine including hardware display virtualization circuitry configured to map virtualized resources of the display engine to a first virtual interface and a second virtual interface of the graphics processing unit:
performing a first rendering operation a render engine of the graphics processing unit in response to a command received via a first virtual interface of system interface circuitry of the graphics processing unit;
performing a second rendering operation in response to a command received via a second virtual interface of the system interface circuitry of the graphics processing unit;
presenting, via, the display engine, output of the first rendering operation via a first physical display plane that is associated with a first virtual display plane mapped to the first virtual interface, including reading output of the first rendering operation via the first physical display plane from a first location in memory of the graphics processing unit; and
presenting, via the display engine, output of the second rendering operation via a second physical display plane that is associated with a second virtual display plane mapped to the second virtual interface, including reading output of the second rendering operation via the second physical display plane from a second location in memory of the graphics processing unit.
10 . The method as in claim 9 , further comprising blending, via the display engine, contents of the first physical display plane with the second physical display plane and output blended contents to a display device, wherein the blended contents include a composition of output of the first rendering operation and the second rendering operation and the first physical display plane and the second physical display plane are configured to have a common configuration.
11 . The method as in claim 9 , further comprising, via the display engine:
outputting contents of the first physical display plane to a first display device via a first physical display connection of the graphics processing unit; and
outputting the contents of the second physical display plane to a second display device via a second physical display connection of the graphics processing unit.
12 . The method as in claim 11 , further comprising, via the display engine, enabling a first display configuration to be set via the first virtual interface and a second display configuration to be set via the second virtual interface.
13 . The method as in claim 12 , further comprising, via the display engine, applying the first display configuration to first display output circuitry associated with the first physical display plane and applying the second display configuration to second display output circuitry associated with the second physical display plane.
14 . A data processing system comprising:
a memory device; and
one or more processors coupled with the memory device, the one or more processors including a graphics processing unit comprising:
system interface circuitry including a first virtual interface and a second virtual interface;
a render engine to perform graphics render operations, the render engine configured to perform a first render operation in response to a command received via the first virtual interface and a second render operation in response to a command received via the second virtual interface; and
a display engine including hardware display virtualization circuitry configured to map virtualized resources of the display engine to the first virtual interface and the second virtual interface, the display engine configured to present output of the first render operation via a first physical display plane that is associated with a first virtual display plane mapped to the first virtual interface, the first physical display plane including circuitry configured to read output of the first render operation from a first location in memory of the graphics processing unit, and present output of the second render operation via a second physical display plane that is associated with a second virtual display plane mapped to the second virtual interface, the second physical display plane including circuitry configured to read output of the second render operation from a second location in memory of the graphics processing unit.
15 . The data processing system as in claim 14 , wherein the display engine is configured to blend contents of the first physical display plane with the second physical display plane and output blended contents to a display device, the blended contents including a composition of output of the first render operation and the second render operation.
16 . The data processing system as in claim 15 , wherein the first physical display plane and the second physical display plane are configured to have a common configuration.
17 . The data processing system as in claim 14 , wherein the display engine is configured to output contents of the first physical display plane to a first display device via a first physical display connector of the graphics processing unit and output the contents of the second physical display plane to a second display device via a second physical display connector of the graphics processing unit, the first physical display connector mapped to a first virtual display pipeline and the second physical display connector manned to a second virtual display pipeline.
18 . The data processing system as in claim 17 , wherein the display engine is to enable a first display configuration to be set via the first virtual interface and a second display configuration to be set via the second virtual interface.
19 . The data processing system as in claim 18 , wherein the first display configuration is applied to first display output circuitry associated with the first physical display plane and the second display configuration is applied to second display output circuitry associated with the second physical display plane.
20 . The data processing system as in claim 14 , wherein the first virtual interface and the second virtual interface each include a single root input/output virtualization (SR-IOV) virtual function or a scalable input/output virtualization (S-IOV) assignable device interface.