Display driving IC device and probe test method using the same

1 . A display driving IC device, comprising:

a first channel block to an N th channel block, each channel block including M source amplifiers, N and M being integers;

source driving pads, each of the source driving pads being connected to the M source amplifiers;

a multiplexer configured to alternately output data from the source amplifiers in a normal mode and selectively provide a test mode path in a test mode, so that a probe test is sequentially performed on a plurality of source amplifiers for each of the first to N th channel blocks through a test pad selected from the source driving pads; and

a control unit configured to control driving of the source amplifiers and the multiplexer,

wherein the multiplexer is configured to include two switching elements disposed between an output terminal of each source amplifier and a corresponding one of the source driving pads, and to provide a normal mode path when the normal mode is set,

wherein, in test mode, the multiplexer is configured to provide the test mode path, such that each source amplifier in the first through N th channel blocks is sequentially connected to the test pad, and the probe test is performed under control of the multiplexer,

wherein test pads of odd channel blocks adjacent to each other among the first to N th channel blocks are shorted to an exterior of the display driving IC device,

wherein test pads of even channel blocks adjacent to each other among the first to N th channel blocks are shorted to the exterior of the display driving IC device,

wherein each pair of channel blocks whose test pads are shorted to each other defines a short-connected pair of channel blocks,

wherein one channel block of the short-connected pair of channel blocks is in an on-state in which test may be performed, and

wherein the other channel block of the short-connected pair of channel blocks is in an off-state awaiting testing.

2 . The display driving IC device of claim 1 , wherein the M is 4, and

wherein in the test mode, the test pad is a source driving pad connected to a third source amplifier of each channel block.

3 . The display driving IC device of claim 1 , wherein test pads each are in contact with measurement units of a test equipment.

4 . The display driving IC device of claim 1 , wherein after testing of a source channel provided in one channel block of the short-connected pair of channel blocks is completed, testing of a source channel provided in the other channel block of the short-connected pair of channel blocks is performed.

5 . The display driving IC device of claim 1 , wherein the M is 4, and

wherein, in normal mode, a source amplifier alternates data output between adjacent odd source driving pads.

6 . The display driving IC device of claim 1 , wherein a source amplifier of a channel block being tested is in a drive-on state, and

wherein a test pad connected to a source channel of other channel blocks to be untested maintains a floating state.

7 . The display driving IC device of claim 1 , wherein the control unit is configured to control driving of the multiplexer such that a source channel is connected to the test pad when a channel block is in an on-state.

8 . A method for performing a probe test using a display driving IC, the method comprising:

externally shorting third test pads of adjacent odd-numbered channel blocks among a first channel block through an N th channel block, the odd-numbered channel blocks including first, third, fifth, and seventh channel blocks, each channel block including M source amplifiers, a multiplexer, and source driving pads, N and M being integers, and externally shorting third test pads of adjacent even-numbered channel blocks among the first through the N th channel blocks, the even-numbered channel blocks including second, fourth, sixth, and eighth channel blocks, wherein the third test pads of the first and third channel blocks, the second and fourth channel blocks, the fifth and seventh channel blocks, and the sixth and eighth channel blocks are externally shorted, respectively;

driving-on any one of the shorted pairs of the channel blocks; and

sequentially testing source channels of the channel blocks that have been driven-on by each measurement unit of a test equipment using the third test pads selected from the source driving pads,

wherein the multiplexer is configured to include two switching elements disposed between an output terminal of each source amplifier and a corresponding one of the source driving pads, and to provide a normal mode path when a normal mode is set, and

wherein, in a test mode, the multiplexer is further configured to provide a test mode path such that each source amplifier in the first through N th channel blocks is sequentially connected to the third test pads to perform the probe test under control of the multiplexer.

9 . The method of claim 8 , wherein the third test pads included in a remaining channel block of the shorted pairs of channel blocks are floated.

10 . The method of claim 8 , further comprising:

when testing is completed for source channels of channel blocks in a drive-on state,

driving-on channel blocks including the third test pads in floating state, and

sequentially testing source channels of each channel block using the third test pads in the corresponding channel block.

11 . The method of claim 8 , wherein the testing comprises:

performing a test with a measurement unit connected to the third test pads while switching and driving the multiplexer of each channel block, and

sequentially connecting the third test pads and source amplifiers included in each channel block.

12 . A method for performing a probe test using a display driving IC comprising a first channel block to an N th channel block, each channel block including M source amplifiers, a multiplexer, and source driving pads, N and M being integers, the method comprising:

performing a first test process, the first test process comprising:

connecting a first measurement unit to a first channel block and a third channel block;

connecting a second measurement unit to a second channel block and a fourth channel block;

connecting a third measurement unit to a fifth channel block and a seventh channel block; and

connecting a fourth measurement unit to a sixth channel block and an eighth channel block; and

sequentially performing a probe test, by the third test pads selected from the source driving pads, on source channels provided in each of the first channel block, second channel block, fifth channel block, and sixth channel block, starting from a first source channel,

wherein the multiplexer is configured to include two switching elements disposed between an output terminal of each source amplifier and a corresponding one of the source driving pads, and to provide a normal mode path when a normal mode is set,

wherein, in a test mode, the multiplexer is further configured to provide a test mode path such that each source amplifier in the first through N th channel blocks is sequentially connected to the third test pads to perform the probe test under control of the multiplexer, and

wherein the third test pads of the first and third channel blocks, the second and fourth channel blocks, the fifth and seventh channel blocks, and the sixth and eighth channel blocks are externally shorted, respectively.

13 . The method of claim 12 , further comprising:

performing a second test process, the second test process comprising:

when the first test process is completed, performing a probe test, by the first to fourth measurement units, on source channels provided in each of the third channel block, fourth channel block, seventh channel block, and eighth channel block, starting from a first source channel.

14 . The method of claim 13 , wherein the first test process and the second test process are performed while sequentially connecting the third test pads and source amplifiers based on switching and driving of a multiplexer provided in each channel block.

15 . The method of claim 12 , wherein, when each source amplifier in the first channel block, second channel block, fifth channel block, and sixth channel block is in a drive-on state, each source amplifier in the third channel block, fourth channel block, seventh channel block, and eighth channel block is in a drive-off state.

16 . The method of claim 12 , wherein, when each source amplifier in the third channel block, fourth channel block, seventh channel block, and eighth channel block is in a drive-on state, each source amplifier in the first channel block, second channel block, fifth channel block, and sixth channel block is in a drive-off state.