Pixel driving circuit, control method thereof, and display device

1 . A pixel driving circuit, wherein the pixel driving circuit is configured to drive a light emitting diode to emit light at different refresh rates, and the pixel driving circuit comprises:

a first control module and a second control module, wherein the first control module is electrically connected to a first gate line, a first initial signal line, and a first node, and configured to write an initial signal of the first initial signal line to the first node under the control of a gate signal of the first gate line, and to hold a potential of the first node at different refresh rates; the second control module is electrically connected to a second gate line, a first voltage signal line, and a second node, and configured to write a voltage signal of the first voltage signal line to the second node under the control of a gate signal of the second gate line, and to hold a potential of the second node at different refresh rates;

a compensation module, wherein the compensation module is electrically connected to a reset signal line, a fourth node, and the first node, and configured to conduct a path between the fourth node and the first node under the control of a reset signal of the reset signal line, and to hold the potential of the first node at different refresh rates;

a refresh module, wherein the refresh module is electrically connected to the first gate line, a data signal line, and a third node, and configured to write a data signal of the data signal line to the third node under the control of the gate signal of the first gate line;

a first reset module, wherein the first reset module is electrically connected to the reset signal line, the first initial signal line, and an anode of the light emitting diode, and configured to reset the anode via the initial signal of the first initial signal line under the control of the reset signal of the reset signal line;

a first light emitting control module, wherein the first light emitting control module is electrically connected to a first light emitting control signal line, a second voltage signal line, the third node, and the first node, and configured to write a voltage signal of the second voltage signal line to the third node under the control of a first control signal of the first light emitting control signal line; and

a driving module and a second light emitting control module, wherein the driving module is electrically connected to the first node, the first voltage signal line, and the fourth node, the second light emitting control module is electrically connected to a second light emitting control signal line, the fourth node, and the anode, the driving module and the second light emitting control module are configured to transmit electrical signals for causing the light emitting diode to emit light in a first light emitting phase, to the anode under the control of the first node and a second control signal of the second light emitting control signal line, respectively, wherein:

the first light emitting control module comprises a seventh transistor, a first capacitor, and a second capacitor;

the seventh transistor has a control electrode electrically connected to the first light emitting control signal line, a first electrode electrically connected to the second voltage signal line, and a second electrode electrically connected to the third node;

the first capacitor has a first electrode electrically connected to the third node, and a second electrode electrically connected to the second node;

the second capacitor has a first electrode electrically connected to the second node, and a second electrode electrically connected to the first node;

the second light emitting control module comprises an eighth transistor;

the eighth transistor has a control electrode electrically connected to the second light emitting control signal line, a first electrode electrically connected to the fourth node, and a second electrode electrically connected to the anode;

the compensation module comprises a second transistor and a ninth transistor;

the second transistor has a control electrode electrically connected to the reset signal line, a first electrode electrically connected to the fourth node, and a second electrode electrically connected to a first electrode of the ninth transistor;

the ninth transistor has a control electrode electrically connected to the second gate line, and a second electrode electrically connected to the first node;

the second control module comprises a fifth transistor;

the fifth transistor has a control electrode electrically connected to the second gate line, a first electrode electrically connected to the first voltage signal line, and a second electrode electrically connected to the second node;

the refresh module comprises a first transistor;

the first transistor has a control electrode electrically connected to the first gate line, a first electrode electrically connected to the data signal line, and a second electrode electrically connected to the third node;

the first reset module comprises a sixth transistor;

the sixth transistor has a control electrode electrically connected to the reset signal line, a first electrode electrically connected to the first initial signal line, and a second electrode electrically connected to the anode;

the seventh transistor is configured to be controlled by the first control signal of the first light emitting control signal line, the eighth transistor is configured to be controlled by the second control signal of the second light emitting control signal line, and the seventh transistor is further configured to be turned on preceding the eighth transistor and keep turned on in the first light emitting phase under the control of the first control signal of the first light emitting control signal line and the second control signal of the second light emitting control signal line;

a duration of the gate signal of the second gate line is configured to cover a duration of the gate signal of the first gate line plus a duration of the reset signal of the reset signal line, and the duration of the gate signal of the first gate line is configured to be less than the duration of the reset signal of the reset signal line; and

the gate signal of the second gate line is configured to be positive voltage to turn on the fifth transistor, and the reset signal of the reset signal line is configured to be negative voltage to turn on the sixth transistor in a compensation phase; and the gate signal of the second gate line is configured to be the negative voltage to turn off the fifth transistor, and the reset signal of the reset signal line is configured to be the negative voltage to turn on the sixth transistor in a second reset phase, wherein the second reset phase follows the first light emitting phase.

2 . The pixel driving circuit according to claim 1 , further comprising:

a second reset module, wherein the second reset module is electrically connected to a scan signal line, a second initial signal line, and a sixth node, and configured to reset the driving module via an initial signal of the second initial signal line under the control of a scan signal of the scan signal line; and

a third light emitting control module, wherein the third light emitting control module is electrically connected to a third light emitting control signal line, the first voltage signal line, and the sixth node, and configured to write a first voltage signal of the first voltage signal line to the driving module under the control of a third light emitting control signal of the third light emitting control signal line.

3 . The pixel driving circuit according to claim 2 , wherein the second reset module comprises a twelfth transistor, and the twelfth transistor has a control electrode electrically connected to the scan signal line, a first electrode electrically connected to the second initial signal line, and a second electrode electrically connected to the sixth node; and

the third light emitting control module comprises a thirteenth transistor, and the thirteenth transistor has a control electrode electrically connected to the third light emitting control signal line, a first electrode electrically connected to the first voltage signal line, and a second electrode electrically connected to the sixth node.

4 . The pixel driving circuit according to claim 1 , wherein the first control module comprises a fourth transistor; and

the fourth transistor has a control electrode electrically connected to the first gate line, a first electrode electrically connected to the first initial signal line, and a second electrode electrically connected to the first node.

5 . The pixel driving circuit according to claim 4 , wherein the fourth transistor comprises an oxide transistor.

6 . The pixel driving circuit according to claim 1 , wherein the driving module comprises a third transistor; and

the third transistor has a control electrode electrically connected to the first node, a first electrode electrically connected to the first voltage signal line, and a second electrode electrically connected to the fourth node.

7 . The pixel driving circuit according to claim 1 , wherein the second transistor comprises an oxide transistor.

8 . The pixel driving circuit according to claim 1 , wherein the ninth transistor comprises an oxide transistor, and the second transistor comprises a non-oxide transistor.

9 . A display device, comprising the pixel driving circuit according to claim 1 .

10 . A control method for controlling the pixel driving circuit according to claim 1 , comprising:

at different refresh rates, refreshing a display frame in a display frame cycle through a first reset phase, a write phase, the compensation phase, and the first light emitting phase.

11 . A control method for controlling the pixel driving circuit according to claim 1 , comprising:

at a first refresh rate, refreshing a display frame in a display frame cycle through a first reset phase, a write phase, the compensation phase, and the first light emitting phase; and

at a second refresh rate, performing a first refresh on the display frame in the display frame cycle through the first reset phase, the write phase, the compensation phase, and the first light emitting phase, and performing refreshes other than the first refresh on the display frame through a second reset phase and a second light emitting phase.

12 . The pixel driving circuit according to claim 1 , wherein the fifth transistor comprises an oxide transistor.